NI-DAQmx Device Considerations

July 2016, 370738AJ-01

This help file contains information specific to analog output (AO) Series devices, B Series devices, C Series devices, digital I/O (DIO) devices, DSA devices, E Series devices, M Series devices, Network DAQ devices, S Series devices, SCC devices, SC Express, SCXI devices, switches, timing I/O (TIO) devices, USB DAQ devices, and X Series devices that might help you as you create applications with NI-DAQmx.

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Analog Triggering

This section contains information about analog triggering for C Series, NI ELVIS II Family, DSA, E Series, M Series, S Series, and SC Express devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Analog Triggering Considerations for C Series, E Series, M Series, and S Series Devices
Triggering Considerations for NI ELVIS II Family Devices
Valid Analog Trigger Sources for DSA Devices
Analog Triggering Considerations for SC Express Devices


Valid Analog Trigger Sources for DSA Devices

The analog trigger source must be a channel included in your physical channel list. PFI 0 is not a valid analog trigger source. PFI 0 is reserved for digital triggers.

Parent topic: Analog Triggering


Analog Triggering Considerations for C Series, E Series, M Series, and S Series Devices

Note Note Not all E Series, M Series, S Series, and C Series devices support analog triggering. For instance, the NI WLS/ENET-9205/9206 devices do not support analog triggering with the NI WLS/ENET-9163 sleeve. Refer to the specifications for your device to determine if your device supports analog triggering.

Many C Series, E Series, M Series, and S Series devices contain a single analog trigger circuit that you can configure for analog triggering. The analog trigger circuitry is a shared resource for the device, and any of the subsystems can use it. This trigger circuitry supports level and slope triggering with hysteresis as well as analog window triggering. After it is configured, the output of this circuitry appears as the Analog Comparison Event, which can be the source for various triggers and clocks within the analog input, analog output, and counter subsystems.

Parent topic: Analog Triggering

Sharing an Analog Trigger for C Series, E Series, M Series, and S Series Devices

Even though the analog trigger is a shared resource, only one analog input or analog output task at a time can configure and reserve it. If you want to share the analog trigger among multiple tasks, configure and reserve it in one task, and use the trigger in subsequent tasks by referring to the source of your trigger, clock, or signal of interest as the Analog Comparison Event. For tasks that support multiple types of analog triggers within the same task, all triggers must share the same configuration settings, or you receive an error. For instance, if you want to use an analog trigger for both your Start and Reference Trigger within an analog input task, the configuration settings for the start and Reference Trigger must be identical.

E Series and S Series Valid Sources for the Analog Trigger

  • PFI 0

    Typically, when configuring an analog trigger, you connect your analog signal to the PFI 0 terminal. Because PFI 0 is the trigger source for both analog and digital signals, NI-DAQmx automatically tristates this terminal when a task exporting a signal on the terminal is not in the committed or running state. This behavior when exporting a signal on PFI 0 differs from typical task-based routing with other PFI lines. It prevents accidental connections of an analog signal directly to digital circuitry, which could permanently damage the device. Also, notice that when connecting an analog signal to PFI 0, the terminal configuration is referenced single-ended.

    Even when PFI 0 is not the source of your analog trigger, you cannot use PFI 0 for other digital signal routes because the analog trigger takes over the PFI 0 terminal internal to the device when it is enabled. If you try to use the analog trigger and PFI 0 for digital signals at the same time, you receive a routing error.
    Note Note On NI PXI-6132/6133 and NI PXIe-6124 devices, you cannot use PFI 0 as the source of an analog trigger. On PXI-6132/6133, the analog triggering circuitry still reserves PFI 0 for internal routing.
  • Analog Input Channel

    In addition to PFI 0, analog input tasks can trigger off of one of the analog input channels being sampled. Because E Series devices use a scanning architecture, many restrictions are placed on how you can use an analog trigger when the source is one of the channels you are sampling. When you use an analog Start Trigger, the trigger channel must be the first channel in the channel list. When you use an Analog Reference or Pause Trigger, and the analog channel is the source of the trigger, there can be only one channel in the channel list. If you have more than one channel for Pause or Reference Triggers, you must use PFI 0. Since S Series devices do not use a scanning architecture, none of these restrictions apply. Therefore, for an S Series device, you can use any analog input channel as the source of the trigger regardless of how many channels are being sampled or the order of the trigger channel in the sequence.

  • Scaling with PFI 0 and Analog Input Channels

    Scaling, including custom scales, is not applied if PFI 0 is the trigger source. For instance, you would specify the DAQmx Trigger Analog Edge Level attribute/property in volts. However, if you use an analog input channel as the trigger source, you could use scaled units.

M Series Valid Sources for the Analog Trigger

  • APFI 0 and APFI 1

    When configuring an analog trigger, connect your analog signal to either the APFI 0 or APFI 1 terminal and specify APFI 0 or APFI 1 as your trigger source.

  • Analog Input Channel

    In addition to APFI 0 and APFI 1, analog input tasks can trigger off of one of the analog input channels being sampled. Because M Series devices use a scanning architecture, many restrictions are placed on how you can use an analog trigger when the source is one of the channels you are sampling. When you use an Analog Start Trigger, the trigger channel must be the first channel in the channel list. When you use an Analog Reference or Pause Trigger, and the analog channel is the source of the trigger, there can be only one channel in the channel list. If you have more than one channel for Pause or Reference Triggers, you must use APFI 0 or APFI 1.

  • Scaling with APFI 0, APFI 1, and Analog Input Channels

    Scaling, including custom scales, is not applied if APFI 0 or APFI 1 is the trigger source. For instance, you would specify the DAQmx Trigger Analog Edge Level attribute/property in volts. However, if you use an analog input channel as the trigger source, you could use scaled units.

Device Calibration and Accuracy of the Analog Trigger for E Series, M Series, C Series, or S Series Devices

The trigger DACs in the analog trigger circuitry on an E Series, M Series, C Series, or S Series device typically contain four less bits of accuracy than the ADC of the device. No hardware calibration is provided for the analog trigger circuitry. In addition, the propagation delay from when a valid trigger condition is met to when the analog trigger circuitry emits the Analog Comparison Event may have an impact on your measurements if the trigger signal has a high slew rate. If you find these conditions have a noticeable impact on your measurements, you can perform software calibration on the analog trigger circuitry by configuring your task as normal and applying a known signal for your analog trigger. Comparing the observed results against the expected results, you can calculate the necessary offsets to apply in software to fine tune the desired triggering behavior.

C Series Valid Sources for the Analog Trigger

The NI 9205 has no APFI 0 or APFI 1 terminal. Analog input tasks using the NI 9205 can trigger off one of the analog input channels being sampled by the NI 9205. When you use an Analog Start Trigger, the trigger channel must be the first channel from the NI 9205 in the channel list, but channels from other C Series devices can come first. When you use an Analog Reference or Pause Trigger, you can use only one channel from the NI 9205 in the channel list, but you can use channels from other C Series devices. You can combine Analog Start, Reference, and Pause Triggers with different configuration settings by using multiple NI 9205 devices. All analog triggers on the same device must share the same configuration settings.


Triggering Considerations for NI ELVIS II Family Devices

On NI ELVIS II Family devices, APFI 0 and APFI 1 are not valid analog trigger sources. When using a Reference Trigger, supported trigger types are analog edge, analog window, and digital edge. When using a Start Trigger, digital edge is the only supported trigger type. Valid digital trigger sources are PFI 15 and SYNC terminals. NI ELVIS II+ also supports analog reference triggering with multiple channels for oscilloscope channels.

Parent topic: Analog Triggering


Analog Triggering Considerations for SC Express Devices

Analog triggering on SC Express devices uses one of the device's ADCs to sample the trigger signal. If the frequency of the trigger signal is higher than the ADC's Nyquist frequency (half of the sampling rate), aliasing may prevent triggers from being detected reliably.

Note Note Analog trigger condition thresholds are reverse-calibrated internally by NI-DAQmx, so it is recommended that you self-calibrate your SC Express device (if self-calibration is supported on your device) prior to running an analog triggered acquisition.

The frequency of the trigger signal is also limited by lowpass filtering on the device's analog front end. On the NI 4300, the lowpass filter can be controlled using the AI.Lowpass.Enable and AI.Lowpass.CutoffFreq channel attributes/properties. On the NI 433x devices, the lowpass filter cutoff frequency is determined by the sampling rate. The analog trigger source can be set to any one of the channels on the device.

Analog triggering on SC Express devices supports only Reference Triggers, not Start and Pause Triggers. Digital triggering on SC Express devices does not have this restriction.

Note Note Analog triggers are not supported on the NI 4322, NI 4353, or NI 4357.
Note Note The NI 4340 supports only analog reference triggering.
Parent topic: Analog Triggering


Device Calibration Considerations

Device calibration consists of verifying the measurement accuracy of a device and adjusting for any measurement error. Verification consists of measuring the performance of the device and comparing these measurements to the published specifications. During calibration, you supply and read voltage levels or other signals using external standards, then you adjust the device calibration constants. The new calibration constants are stored in the EEPROM. These calibration constants are loaded from memory as needed to adjust for the error in the measurements taken by the device.

Parent topic: NI-DAQmx Device Considerations
Related concepts
AO Series Calibration
C Series Calibration
DSA Calibration
E Series Calibration
M Series, NI 6010, NI 9205, and NI 9206 Calibration
NI 6154 Calibration
NI 6614 Calibration
NI PXI-6608 Calibration
S Series Calibration
SC Express Calibration
SCXI-1600 Calibration
Virtual Channel Calibration Support
X Series Calibration


AO Series Calibration

Your device uses software calibration to fine-tune the analog output circuitry. The software must be programmed (or loaded) with certain numbers called calibration constants. Those constants are stored in nonvolatile memory (EEPROM) on your device or are maintained by NI-DAQmx. To achieve specification accuracy, you should self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Static AO devices, such as the NI 6703 and NI 6704, do not self-calibrate or automatically calibrate. You must use a manual procedure to calibrate static AO devices.

Refer to ni.com/support/calibrat/mancal for detailed instructions about calibrating your device.

Note Note
  • Calibrating your AO device takes some time. Do not be alarmed if the Self-Calibrate or Adjust AO Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.

NI-DAQmx automatically loads calibration constants into the software whenever you call functions/VIs that depend on them.

Parent topic: Device Calibration Considerations
Related concepts
Device Calibration Signal Connections for AO Series Devices
Related information
ni.com/support/calibrat/mancal


C Series Calibration

Your device uses software calibration to adjust the software scaling of signals read from and produced by your device. Using a precise reference signal, your device measures and calculates scaling constants for analog input and analog output. The scaling constants are stored in nonvolatile memory (EEPROM) on your device. NI recommends that you calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the Adjust C Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
  • The NI 9205 and NI 9206 are calibrated using the M Series calibration process.

C Series devices do not self-calibrate or automatically calibrate. You must use a manual procedure to calibrate these devices.

Parent topic: Device Calibration Considerations
Related information
ni.com/support/calibrat/mancal


Virtual Channel Calibration Support

The following devices do not support NI-DAQmx virtual channel calibration:

  • NI DAQPad-6015
  • NI DAQPad-6016
  • NI PCI-6010
  • NI PCI-6013
  • NI PCI-6014
  • NI USB-6000
  • NI USB-6001
  • NI USB-6002
  • NI USB-6003
  • NI USB-6008
  • NI USB-6009
  • SensorDAQ
Parent topic: Device Calibration Considerations


DSA Calibration

Your device contains digital correction circuitry to compensate for gain and offset errors in the analog and ADC circuitry. The gain and offset calibration constants are stored in nonvolatile memory (EEPROM) on your device. NI-DAQmx writes these calibration constants to the digital correction circuitry.

To achieve the maximum accuracy, you should perform external calibration at least once per year (the recommended external calibration interval) and perform self-calibration prior to measurement sessions or otherwise, as desired. You should calibrate your device only after your computer and the device have been powered on and warmed up for at least 15 minutes.

Parent topic: Device Calibration Considerations

Self-Calibration

Self-calibration is executed with the Self Calibrate VI/function. When you self-calibrate a DSA device, you do not need signal connections. However, for devices with analog output channels, values generated on those output channels can change during the calibration process. If you have external equipment connected to the AO channels and changing the AO voltage could damage the external equipment, you should disconnect the external equipment before performing the self-calibration.

Note Note Some DSA devices do not support self-calibration.

External Calibration

External calibration is performed using a customized calibration program and external test equipment that has itself been calibrated to the required accuracy or standard. This operation is usually performed by a specialized metrology laboratory. The equipment and connections required to externally calibrate a device varies depending on the device category. For devices that support DC coupling, you need a stable and accurate DC voltage signal to calibrate the AI subsystem. For devices that support AC coupling, a sinusoidal source may be required for the calibration procedure instead of the DC source. NI 4461, 4462, 4463, 4464, 4480, and 4481 devices also include an adjustable frequency timebase. You need a stable sinusoidal frequency source to calibrate this timebase. The NI PCI-4461, NI PXI-4461, NI PXIe-4463, and NI USB-4431 devices also support analog output. You need a digital multimeter (DMM) to calibrate the AO subsystem. The DC voltage, frequency source, and DMM can be manually or automatically controlled and switched between channels, depending on the nature of the customized calibration program.


E Series Calibration

Your device uses hardware calibration to adjust the analog circuitry. This calibration is done with calibration digital-to-analog converters, called calDACs, that fine-tune the analog circuitry. The calDACs must be programmed (or loaded) with certain numbers called calibration constants. Those constants are stored in nonvolatile memory (EEPROM) on your device or are maintained by NI-DAQmx. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your MIO or AI device takes some time. Do not be alarmed if the Self-Calibrate or Adjust E Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
Parent topic: Device Calibration Considerations

Calibration Constant Loading by NI-DAQmx

NI-DAQmx automatically loads calibration constants into calDACs whenever you call functions/VIs that depend on them. The following conditions apply:

  • 12-bit E Series devices
    • 12-bit devices use a single set of calibration constants for both unipolar and bipolar modes of analog input.
    • One set of constants is valid for unipolar, and another set is valid for bipolar configuration of the analog output channels. When you change the polarity of an analog output channel, NI-DAQmx reloads the calibration constants for that channel.
  • 16-bit E Series devices
    • Calibration constants required by the 16-bit E Series devices for unipolar analog input channels are different from those for bipolar analog input channels. If you are acquiring data from one channel, or if all of the channels you are acquiring data from are configured for the same polarity, NI-DAQmx selects the appropriate set of calibration constants for you. If you are scanning several channels, and you mix channels configured for unipolar and bipolar mode in your scan list, NI-DAQmx loads the calibration constants that correspond to the first channel in the scan list.
    • NI 6025E devices use a single set of calibration constants for both unipolar and bipolar modes of analog input.
    • One set of constants is valid for unipolar, and another set is valid for bipolar configuration of the analog output channels. When you change the polarity of an analog output channel, NI-DAQmx reloads the calibration constants for that channel.
Related concepts
Device Calibration Signal Connections for E Series Devices


M Series, NI 6010, NI 9205, and NI 9206 Calibration

Your device uses software calibration to adjust the software scaling of signals read from and produced by your device. Using calibration pulse width modulated (PWM) sources with a reference voltage, your device measures and calculates scaling constants for analog input and analog output. The scaling constants are stored in nonvolatile memory (EEPROM) on your device. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the Self-Calibrate or Adjust M Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
  • The NI WLS/ENET-9205 and NI WLS/ENET-9206 support only self-calibration. They do not support external calibration.
Parent topic: Device Calibration Considerations


NI 6154 Calibration

Your device uses software calibration to adjust the software scaling of signals read from and produced by your device. Using calibration pulse-width modulated (PWM) sources with a reference voltage, your device measures and calculates scaling constants for analog input and analog output. The scaling constants are stored in nonvolatile memory (EEPROM) on your device. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the Self-Calibrate or Adjust S Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
Parent topic: Device Calibration Considerations


NI 6614 Calibration

Only external calibration, not self-calibration, is supported for NI 6614 devices. You should allow 15 minutes of warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the DAQmx Adjust TIO Timebase Calibration function/VI takes several minutes to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
Parent topic: Device Calibration Considerations


NI PXI-6608 Calibration

You cannot calibrate the PXI-6608 in NI-DAQmx. The device must be calibrated using the Traditional NI-DAQ (Legacy) driver. To use the NI PXI-6608 in NI-DAQmx after calibrating it in Traditional NI-DAQ (Legacy), you must do one of the following:

  • Call the Traditional NI-DAQ (Legacy) Device Reset function/VI.

    —or—

  • Right-click the Traditional NI-DAQ (Legacy) Devices folder in MAX and select Reset Driver for Traditional NI-DAQ.
Parent topic: Device Calibration Considerations


S Series Calibration

Your device uses hardware calibration to adjust the analog circuitry. This calibration is done with calibration digital-to-analog converters, called calDACs, that fine-tune the analog circuitry. The calDACs must be programmed (or loaded) with certain numbers called calibration constants. Those constants are stored in nonvolatile memory (EEPROM) on your device or are maintained by NI-DAQmx. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your MIO or AI device takes some time. Do not be alarmed if the DAQmx Self-Calibrate or Adjust S Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
Parent topic: Device Calibration Considerations
Related concepts
Device Calibration Signal Connections for S Series Devices


SC Express Calibration

The NI 4300 and NI 4340 use software calibration to adjust the software scaling of signals read from and produced by your device. Using onboard calibration pulse-width modulated (PWM) sources and an external reference voltage, your device calculates scaling constants for analog input. The scaling constants are stored in nonvolatile memory (EEPROM) on your device. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the Self-Calibrate or Adjust 4300 Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.

The NI 4322, NI 433x, NI 4353, and NI 4357 do not self-calibrate or automatically calibrate. You must use a manual procedure to calibrate NI 4322, NI 433x, NI 4353, and NI 4357 devices.

Parent topic: Device Calibration Considerations
Related information
ni.com/support/calibrat/mancal


SCXI-1600 Calibration

The external calibration process for the SCXI-1600 module is nearly identical to the E Series devices. However, when applying a precision voltage to the module, you must connect the signal to the EXTCAL BNC connector on the front of the SCXI-1600, instead of the AI0 analog input channel. In LabVIEW, use the Adjust E-Series Calibration VI, instead of the Adjust SC Baseboard Calibration VI.

Parent topic: Device Calibration Considerations


X Series Calibration

Your device uses software calibration to adjust the software scaling of signals read from and produced by your device. Using calibration pulse width modulated (PWM) sources with a reference voltage, your device measures and calculates scaling constants for analog input and analog output. The scaling constants are stored in nonvolatile memory (EEPROM) on your device. NI recommends that you self-calibrate your device just before a measurement session but after your computer and the device have been powered on and warmed up for at least 15 minutes. You should allow this same warm-up time before performing any calibration of your system. Frequent calibration produces the most stable and repeatable measurement performance. The device is not harmed in any way if you recalibrate it often.

Note Note
  • Calibrating your device takes some time. Do not be alarmed if the Self-Calibrate or Adjust X Series Calibration function/VI takes several seconds to execute.
  • For best results, stop any ongoing tasks and disconnect any unnecessary external connections before running calibration.
Parent topic: Device Calibration Considerations


Signal Connections

This section contains information about calibration signal connections for AO Series, E Series, M Series, NI 6010, NI 6154, S Series, and X Series devices.

Parent topic: Device Calibration Considerations
Related concepts
Device Calibration Signal Connections for AO Series Devices
Device Calibration Signal Connections for E Series Devices
Device Calibration Signal Connections for M Series and NI 6010 Devices
Device Calibration Signal Connections for the NI 6154
Device Calibration Signal Connections for NI 6614
Device Calibration Signal Connections for S Series Devices
Device Calibration Signal Connections for X Series Devices


Device Calibration Signal Connections for AO Series Devices

When you self-calibrate your AO Series device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process.

When externally calibrating your AO Series device, connect the signals as described below for the type of AO Series device you are calibrating. Set the reference voltage between +6.000 V and +9.999 V. Typically, you use a calibrator or other stable voltage source for the reference voltage. Do not use a power supply as its signals are not very stable.

Follow these steps for AO Series devices:

  1. Connect the positive output of your reference voltage source to the EXT REF terminal.
  2. Connect the negative output of your reference voltage source to the AO GND terminal.
Parent topic: Signal Connections
Related information
ni.com/support/calibrat/mancal


Device Calibration Signal Connections for E Series Devices

When you self-calibrate your E Series device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process. If you have external circuitry connected to the analog output channels and you do not want changes on these channels, you should disconnect the circuitry before beginning the self-calibration.

When externally calibrating your E Series device, connect the signals as described below for the type of E Series device you are calibrating. Set the reference voltage between +6.000 V and +9.999 V. Typically, you use a calibrator or other stable voltage source for the reference voltage. Do not use a power supply as its signals are not very stable.

  • 12-Bit E Series Devices

    Follow these steps for 12-bit E Series devices:

    1. Connect the positive output of your reference voltage source to physical channel ai8.
    2. Connect the negative output of your reference voltage source to the AI SENSE terminal.
    3. Connect physical channel ao0 to physical channel ai0.
    4. If your reference voltage source and your computer are floating with respect to each other, connect the AI SENSE terminal to the AI GND terminal as well as to the negative output of your reference voltage source.
  • 16-Bit E Series Devices

    Follow these steps for 16-bit E Series devices:

    1. Connect the positive output of your reference voltage source to physical channel ai0.
    2. Connect the negative output of your reference voltage source to physical channel ai8.
    3. If your reference voltage source and your computer are floating with respect to each other, connect the negative output of your reference voltage source to the AI GND terminal as well as to physical channel ai8.
Parent topic: Signal Connections


Device Calibration Signal Connections for S Series Devices

When you self-calibrate your S Series device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process. If you have external circuitry connected to the analog output channels that is sensitive to these changes, you should disconnect the circuitry before beginning self-calibration.

When externally calibrating your S Series device, connect the signals as described below. Set the reference voltage to the following:

  • NI PCI/PXI 6143: between 3.0 V and 4.998 V
  • NI PCI/PXI 6115: between 4.995 V and 5.005 V
  • NI PCI/PXI 6120: between 4.995 V and 5.005 V
  • All other S Series Devices: between 6.0 V and 9.998 V

Typically, you should use a calibrator or other stable voltage source for calibration. Do not use a power supply as its signals are not very stable.

For external calibration, make the following signal connections:

  1. Connect the positive output of your reference voltage source to ACH0+.
  2. Connect the negative output of your reference voltage source to ACH0-.
Parent topic: Signal Connections


Device Calibration Signal Connections for M Series and NI 6010 Devices

When you self-calibrate your M Series or NI 6010 device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process. If you have external circuitry connected to the analog output channels and you do not want changes on these channels, you should disconnect the circuitry before beginning the self-calibration.

When externally calibrating your M Series or NI 6010 device, connect the signals as described below for the type of device you are calibrating. Set the reference voltage between +6.0 V and +8.5 V for M Series devices, between +3.5 V and 4.0 V for NI 6010 devices. Typically, you use a calibrator or other stable voltage source for the reference voltage. Do not use a power supply as its signals are not very stable.

Follow these steps:

  1. Disconnect any external connections or circuitry to your device.
  2. Connect the positive output of your reference voltage source to physical channel ai0.
  3. Connect the negative output of your reference voltage source to physical channel ai8.
  4. If your reference voltage source and your computer are floating with respect to each other, connect the negative output of your reference voltage source to the AI GND terminal as well as to physical channel ai8.
Parent topic: Signal Connections


Device Calibration Signal Connections for the NI 6154

When you self-calibrate your NI 6154 device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process.

When externally calibrating your NI 6154 device, connect the signals as described below for the type of device you are calibrating. Set the reference voltage between +6.0 V and +9.998 V. Typically, you use a calibrator or other stable voltage source for the reference voltage. Do not use a power supply as its signals are not very stable.

Follow these steps:

  1. Disconnect any external connections or circuitry to your device.
  2. Connect the positive output of your reference voltage source to physical channel AI0+.
  3. Connect the negative output of your reference voltage source to physical channel AI0-.
Parent topic: Signal Connections


Device Calibration Signal Connections for NI 6614

For signal connections needed to externally calibrate your NI 6614, refer to the calibration procedure for the NI 6614.

Parent topic: Signal Connections


Device Calibration Signal Connections for X Series Devices

When you self-calibrate your X Series device, no signal connections are necessary. However, values generated on the analog output channels change during the calibration process. If you have external circuitry connected to the analog output channels and you do not want changes on these channels, you should disconnect the circuitry before beginning the self-calibration.

When externally calibrating (or adjusting) your X Series device, connect the signals as described below for the type of device you are calibrating. Set the reference voltage between +6.0 V and +8.5 V for X Series devices. You should use a calibrator or other stable voltage source for the reference voltage. Do not use a power supply as its signals are not very stable.

Follow these steps:

  1. Disconnect any external connections or circuitry to your device.
  2. Connect the positive output of your reference voltage source to physical channel ai0.
  3. Connect the negative output of your reference voltage source to physical channel ai8.
  4. If your reference voltage source and your computer are floating with respect to each other, connect the negative output of your reference voltage source to the AI GND terminal as well as to physical channel ai8.
Parent topic: Signal Connections


Counters

This section contains information on counter signal connections and routing diagrams that illustrate the internal counter routing.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Connecting Counter Signals
Counter Internal Routing Diagrams


Averaging Support

The following devices support averaging digital frequency and period measurements:

  • Parallel digital I/O modules connected to NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 chassis. Refer to Digital I/O Considerations for C Series Devices.
  • NI 661x devices
  • X Series devices
Parent topic: Counters
Related concepts
Configuring a Time-Based Measurement in NI-DAQmx
Digital I/O Considerations for C Series Devices


C Series Counter Modules

The NI 9361 counter input module supports the following measurement types:

  • Duty cycle
  • Event counting
  • Encoder position
  • Frequency
  • Period
  • Pulse width
  • Velocity

The NI 9361 has eight counters and supports adding multiple counter channels to the same task. A single task can have different measurement types. Multiple counter module channels can be added to the same task.

Note Note
  • You cannot mix module and chassis counters in the same task.
  • You cannot use the chassis counter through the counter module.
  • You cannot create multiple counter tasks with a single NI 9361.
  • You cannot have more than two NI 9361 with different timing/triggering configuration in a single chassis.
  • The NI 9361 is not supported on the NI cDAQ-9172 chassis.
Parent topic: Counters


Connecting Counter Signals

The default terminals used for counter measurements and generations vary from device to device. Follow the links below for information specific to your device. To override the default input terminal, set the DAQmx Channel Input Terminal attribute/property for the measurement type. For instance, if you are counting edges, you would use CI.CountEdges.Term. To override the default output terminal, set the DAQmx Channel Output Terminal attribute/property to the desired value.

Parent topic: Counters
Related reference
AO Series, E Series, and S Series Signal Connections for Counters
Bus-Powered M Series Signal Connections for Counters
C Series Signal Connections for Counters
myDAQ Signal Connections for Counters
NI ELVIS II Family Signal Connections for Counters
TIO Signal Connections for Counters
X Series Signal Connections for Counters
37-Pin DSUB Signal Connections for Counters
68-Pin M Series Signal Connections for Counters


Bus-Powered M Series Signal Connections for Counters

The following table lists the default input terminals for various counter measurements on bus-powered M Series devices. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

16-PFI Line Devices (NI 6218)

Count Edges | Edges: PFI 0 Count Direction: PFI 9 | Edges: PFI 3 Count Direction: PFI 10
Pulse Width Measurement | PFI 1 | PFI 2
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 2
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 3
Semiperiod Measurement | PFI 1 | PFI 2
Two-Edge Separation Measurement
  • Start: PFI 9
  • Stop: PFI 1
  • Start: PFI 10
  • Stop: PFI 2
Position Measurement
  • A: PFI 0
  • B: PFI
  • Z: PFI 1
  • A: PFI 3
  • B: PFI 10
  • Z: PFI 2

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 4 | PFI 5

16-PFI Line Devices (NI 6212/6216)

Measurement | Ctr0 | Ctr1
Count Edges
  • Edges: PFI 8
  • Count Direction: PFI 10
  • Edges: PFI 3
  • Count Direction: PFI 11
Pulse Width Measurement | PFI 9 | PFI 4
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 9 | PFI 4
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 8 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 8 | PFI 3
Semiperiod Measurement | PFI 9 | PFI 4
Two-Edge Separation Measurement
  • Start: PFI 10
  • Stop: PFI 9
  • Start: PFI 11
  • Stop: PFI 4
Position Measurement
  • A: PFI 8
  • B: PFI 10
  • Z: PFI 9
  • A: PFI 3
  • B: PFI 11
  • Z: PFI 4

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 12 | PFI 13

8-PFI Line Devices (Such as the NI 6210/6211/6215)

Measurement | Ctr0 | Ctr1

Count Edges

  • Edges: PFI 0
  • Count Direction: PFI 0
  • Edges: PFI 3
  • Count Direction: PFI 3
Pulse Width Measurement | PFI 1 | PFI 2
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 2
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 3
Semiperiod Measurement | PFI 1 | PFI 2
Two-Edge Separation Measurement
  • Start: PFI 0
  • Stop: PFI 1
  • Start: PFI 3
  • Stop: PFI 2
Position Measurement
  • A: PFI 0
  • B: PFI 1
  • Z: PFI 2
  • A: PFI 3
  • B: PFI 2
  • Z: PFI 1

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 4 | PFI 5
Parent topic: Connecting Counter Signals
Related concepts
Self-Powered Versus Bus-Powered M Series USB Devices


C Series Signal Connections for Counters

The following tables lists the default input terminals for various counter measurements. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

NI 9401, NI 9421, NI 9422, NI 9423, NI 9436, and NI 9437 (8-Channel)

Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 2
  • Edges: PFI 4
  • Count Direction: PFI 6
  • Edges: PFI 3
  • Count Direction: PFI 0
  • Edges: PFI 7
  • Count Direction: PFI 4
Pulse Width Measurement | PFI 1 | PFI 5 | PFI 2 | PFI 6
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 5 | PFI 2 | PFI 6
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 4 | PFI 3 | PFI 7
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 4 | PFI 3 | PFI 7
Semiperiod Measurement | PFI 1 | PFI 5 | PFI 2 | PFI 6
Two-Edge Separation Measurement
  • Start: PFI 2
  • Stop: PFI 1
  • Start: PFI 6
  • Stop: PFI 5
  • Start: PFI 0
  • Stop: PFI 2
  • Start: PFI 4
  • Stop: PFI 6
Position Measurement
  • A: PFI 0
  • B: PFI 2
  • Z: PFI 1
  • A: PFI 4
  • B: PFI 6
  • Z: PFI 5
  • A: PFI 3
  • B: PFI 0
  • Z: PFI 2
  • A: PFI 7
  • B: PFI 4
  • Z: PFI 6

NI 9402 and NI 9435 (4-Channel)

Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 2
  • Edges: PFI 3
  • Count Direction: PFI 1
  • Edges: PFI 1
  • Count Direction: PFI 0
  • Edges: PFI 2
  • Count Direction: PFI 3
Pulse Width Measurement | PFI 1 | PFI 2 | PFI 3 | PFI 0
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 2 | PFI 3 | PFI 0
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 3 | PFI 1 | PFI 2
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 3 | PFI 1 | PFI 2
Semiperiod Measurement | PFI 1 | PFI 2 | PFI 3 | PFI 0
Two-Edge Separation Measurement
  • Start: PFI 2
  • Stop: PFI 1
  • Start: PFI 1
  • Stop: PFI 2
  • Start: PFI 0
  • Stop: PFI 3
  • Start: PFI 3
  • Stop: PFI 0
Position Measurement
  • A: PFI 0
  • B: PFI 2
  • Z: PFI 1
  • A: PFI 3
  • B: PFI 1
  • Z: PFI 2
  • A: PFI 1
  • B: PFI 0
  • Z: PFI 3
  • A: PFI 2
  • B: PFI 3
  • Z: PFI 0

NI 9411 (6-Channel)

Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 2
  • Edges: PFI 3
  • Count Direction: PFI 5
  • Edges: PFI 2
  • Count Direction: PFI 1
  • Edges: PFI 5
  • Count Direction: PFI 4
Pulse Width Measurement | PFI 1 | PFI 4 | PFI 0 | PFI 3
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 4 | PFI 0 | PFI 3
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 3 | PFI 2 | PFI 5
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 3 | PFI 2 | PFI 5
Semiperiod Measurement | PFI 1 | PFI 4 | PFI 0 | PFI 3
Two-Edge Separation Measurement
  • Start: PFI 2
  • Stop: PFI 1
  • Start: PFI 5
  • Stop: PFI 4
  • Start: PFI 1
  • Stop: PFI 0
  • Start: PFI 4
  • Stop: PFI 3
Position Measurement
  • A: PFI 0
  • B: PFI 2
  • Z: PFI 1
  • A: PFI 3
  • B: PFI 5
  • Z: PFI 4
  • A: PFI 2
  • B: PFI 1
  • Z: PFI 0
  • A: PFI 5
  • B: PFI 4
  • Z: PFI 3

The following tables list the output terminals for counter output. You can use a different PFI line for any of the output terminals.

NI 9401, NI 9472, NI 9474, NI 9475, and NI 9485 (8-Channel)

Ctr0 | Ctr1 | Ctr2 | Ctr3 | FreqOut
PFI 3 | PFI 7 | PFI 1 | PFI 5 | PFI 2

NI 9481, NI 9482, and NI 9402 (4-Channel)

Ctr0 | Ctr1 | Ctr2 | Ctr3 | FreqOut
PFI 0 | PFI 3 | PFI 1 | PFI 2 | PFI 1

NI 9361 (8-Counters)

Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3 | Ctr4 | Ctr5 | Ctr6 | Ctr7
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 7
  • Reset: PFI4
  • Edges: PFI 1
  • Count Direction: PFI 6
  • Reset: PFI5
  • Edges: PFI 2
  • Count Direction: PFI 5
  • Reset: PFI6
  • Edges: PFI 3
  • Count Direction: PFI 4
  • Reset: PFI7
  • Edges: PFI 4
  • Count Direction: PFI 3
  • Reset: PFI0
  • Edges: PFI 5
  • Count Direction: PFI 2
  • Reset: PFI1
  • Edges: PFI 6
  • Count Direction: PFI 1
  • Reset: PFI2
  • Edges: PFI 7
  • Count Direction: PFI 0
  • Reset: PFI3
Duty Cycle Measurement | PFI 0 | PFI 1 | PFI 2 | PFI 3 | PFI 4 | PFI 5 | PFI 6 | PFI 7
Pulse Width Measurement | PFI 0 | PFI 1 | PFI 2 | PFI 3 | PFI 4 | PFI 5 | PFI 6 | PFI 7
Period/Frequency Measurement (Dynamic Averaging) | PFI 0 | PFI 1 | PFI 2 | PFI 3 | PFI 4 | PFI 5 | PFI 6 | PFI 7
Position Measurement
  • A: PFI 0
  • B: PFI 4
  • Z: PFI 7
  • A: PFI 1
  • B: PFI 5
  • Z: PFI 6
  • A: PFI 2
  • B: PFI 6
  • Z: PFI 5
  • A: PFI 3
  • B: PFI 7
  • Z: PFI 4
  • A: PFI 4
  • B: PFI 0
  • Z: PFI 3
  • A: PFI 5
  • B: PFI 1
  • Z: PFI 2
  • A: PFI 6
  • B: PFI 2
  • Z: PFI 1
  • A: PFI 7
  • B: PFI 3
  • Z: PFI 0
Velocity
  • A: PFI 0
  • B: PFI 4
  • A: PFI 1
  • B: PFI 5
  • A: PFI 2
  • B: PFI 6
  • A: PFI 3
  • B: PFI 7
  • A: PFI 4
  • B: PFI 0
  • A: PFI 5
  • B: PFI 1
  • A: PFI 6
  • B: PFI 2
  • A: PFI 7
  • B: PFI 3
Parent topic: Connecting Counter Signals


AO Series, E Series, and S Series Signal Connections for Counters

The following table lists the default input terminals for various counter measurements. You can use a different PFI line for any of the input terminals, with the exception of the count direction terminal for edge counting. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0 | Ctr1
Count Edges
  • Edges: PFI 8
  • Count Direction1: port0/line6
  • Edges: PFI 3
  • Count Direction1: port0/line7
Pulse Width Measurement | PFI 9 | PFI 4
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 9 | PFI 4
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 8 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 8 | PFI 3
Semiperiod Measurement | PFI 9 | PFI 4

The following table lists the default output terminals for counter output. You must use the default output terminal, with the exception that for Ctr0, you can select a RTSI line.

Ctr0 | Ctr1
CTR 0 OUT | CTR 1 OUT
Parent topic: Connecting Counter Signals
1 The count direction terminal must be tristated to use an external signal. Reset the device to ensure the terminal is tristated


myDAQ Signal Connections for Counters

The following table lists the default input terminals for various counter measurements on myDAQ. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 2
Pulse Width Measurement | PFI 1
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1
Pulse Measurement | PFI 1
Semiperiod Measurement | PFI 1
Two-Edge Separation Measurement
  • Start: PFI 2
  • Stop: PFI 1
Position Measurement
  • A: PFI 0
  • B: PFI 2
  • Z: PFI 1

The following table lists the output terminals for counter output. You can use a different PFI line for the output terminal.

Ctr0
PFI 3
Parent topic: Connecting Counter Signals


NI ELVIS II Family Signal Connections for Counters

The following table lists the default input terminals for various counter measurements. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0 | Ctr1
Count Edges
  • Edges: PFI 8
  • Count Direction: PFI 10
  • Edges: PFI 3
  • Count Direction: PFI 11
Pulse Width Measurement | PFI 9 | PFI 4
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 9 | PFI 4
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 8 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 8 | PFI 3
Semiperiod Measurement | PFI 9 | PFI 4
Two-Edge Separation Measurement
  • Start: PFI 10
  • Stop: PFI 9
  • Start: PFI 11
  • Stop: PFI 4
Position Measurement
  • A: PFI 8
  • B: PFI 10
  • Z: PFI 9
  • A: PFI 3
  • B: PFI 11
  • Z: PFI 4

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 12 | PFI 13
Parent topic: Connecting Counter Signals


TIO Signal Connections for Counters

The following table lists the default input terminals for various counter measurements. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel properties/attributes.

Note Note You cannot change the default PFI lines for quadrature encoder-based position measurements on NI 660x devices.
Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3 | Ctr4 | Ctr5 | Ctr6 | Ctr7 | gpsTimestampCtr0 (NI 6608 Only) | gpsTimestampCtr1 (NI 6608 Only)
Count Edges
  • Edges: PFI 39
  • Count Direction: PFI 37
  • Edges: PFI 35
  • Count Direction: PFI 33
  • Edges: PFI 31
  • Count Direction: PFI 29
  • Edges: PFI 27
  • Count Direction: PFI 25
  • Edges: PFI 23
  • Count Direction: PFI 21
  • Edges: PFI 19
  • Count Direction: PFI 17
  • Edges: PFI 15
  • Count Direction: PFI 13
  • Edges: PFI 11
  • Count Direction: PFI 9
N/A N/A
Pulse Width Measurement | PFI 38 | PFI 34 | PFI 30 | PFI 26 | PFI 22 | PFI 18 | PFI 14 | PFI 10 | N/A | N/A
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 38 | PFI 34 | PFI 30 | PFI 26 | PFI 22 | PFI 18 | PFI 14 | PFI 10 | N/A | N/A
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 39 | PFI 35 | PFI 31 | PFI 27 | PFI 23 | PFI 19 | PFI 15 | PFI 11 | N/A | N/A
Period/Frequency Measurement (Large Range with Two Counters) | PFI 39 | PFI 35 | PFI 31 | PFI 27 | PFI 23 | PFI 19 | PFI 15 | PFI 11 | N/A | N/A
Semiperiod Measurement | PFI 38 | PFI 34 | PFI 30 | PFI 26 | PFI 22 | PFI 18 | PFI 14 | PFI 10 | N/A | N/A
Two-Edge Separation Measurement
  • Start: PFI 37
  • Stop: PFI 38
  • Start: PFI 33
  • Stop: PFI 34
  • Start: PFI 29
  • Stop: PFI 30
  • Start: PFI 25
  • Stop: PFI 26
  • Start: PFI 21
  • Stop: PFI 22
  • Start: PFI 17
  • Stop: PFI 18
  • Start: PFI 13
  • Stop: PFI 14
  • Start: PFI 9
  • Stop: PFI 10
N/A N/A
Position Measurement
  • A: PFI 39
  • B: PFI 37
  • Z: PFI 38
  • A: PFI 35
  • B: PFI 33
  • Z: PFI 34
  • A: PFI 31
  • B: PFI 29
  • Z: PFI 30
  • A: PFI 27
  • B: PFI 25
  • Z: PFI 26
  • A: PFI 23
  • B: PFI 21
  • Z: PFI 22
  • A: PFI 19
  • B: PFI 17
  • Z: PFI 18
  • A: PFI 15
  • B: PFI 13
  • Z: PFI 14
  • A: PFI 11
  • B: PFI 9
  • Z: PFI 10
N/A N/A
GPS Timestamp Measurement N/A N/A N/A N/A N/A N/A N/A N/A
  • PFI 7
  • Synch. Source: PFI 7
  • PFI 7
  • Synch. Source: PFI 7
Note Note The NI 6601 has only four counters (ctr0-ctr3). The entries in the previous table for cntr4, cntr5, cntr6, and cntr7 do not apply for that device.

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1 | Ctr2 | Ctr3 | Ctr4 | Ctr5 | Ctr6 | Ctr7
PFI 36 | PFI 32 | PFI 28 | PFI 24 | PFI 20 | PFI 16 | PFI 12 | PFI 8
Note Note The NI 6601 has only four counters (ctr0-ctr3). The entries in the previous table for cntr4, cntr5, cntr6, and cntr7 do not apply for that device.
Parent topic: Connecting Counter Signals

NI 6624 Issues

The eight PFI lines listed as the defaults for counter output are dedicated for output, and they are the only terminals you can use for counter output. For example, you can use PFI 8 (the default for Ctr7) as the output terminal for any counter, but you cannot use it as an input terminal.

When using counter output, if the Idle State attribute/property is low, the optocouplers on the NI 6624 will still be driving your output load. Set the Idle State attribute/property to high to prevent driving the output after your task completes.


X Series Signal Connections for Counters

The following table lists the default input terminals for various counter measurements on X Series devices. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0 | Ctr1 | Ctr2 | Ctr3
Count Edges
  • Edges: PFI 8
  • Count Direction: PFI 10
  • Edges: PFI 3
  • Count Direction: PFI 11
  • Edges: PFI 0
  • Count Direction: PFI 2
  • Edges: PFI 5
  • Count Direction: PFI 7
Pulse Width Measurement | PFI 9 | PFI 4 | PFI 1 | PFI 6
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 9 | PFI 4 | PFI 1 | PFI 6
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 8 | PFI 3 | PFI 0 | PFI 5
Period/Frequency Measurement (Large Range with Two Counters) | PFI 8 | PFI 3 | PFI 0 | PFI 5
Pulse Measurement | PFI 9 | PFI 4 | PFI 1 | PFI 6
Semiperiod Measurement | PFI 9 | PFI 4 | PFI 1 | PFI 6
Two-Edge Separation Measurement
  • Start: PFI 10
  • Stop: PFI 9
  • Start: PFI 11
  • Stop: PFI 4
  • Start: PFI 2
  • Stop: PFI 1
  • Start: PFI 7
  • Stop: PFI 6
Position Measurement
  • A: PFI 8
  • B: PFI 10
  • Z: PFI 9
  • A: PFI 3
  • B: PFI 11
  • Z: PFI 4
  • A: PFI 0
  • B: PFI 2
  • Z: PFI 1
  • A: PFI 5
  • B: PFI 7
  • Z: PFI 6

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1 | Ctr2 | Ctr3
PFI 12 | PFI 13 | PFI 14 | PFI 15
Parent topic: Connecting Counter Signals


37-Pin DSUB Signal Connections for Counters

The following table lists the default input terminals for various counter measurements for devices that use the 37-Pin DSUB connector such as the NI 6010, NI 6154, and NI 623x. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0 | Ctr1
Count Edges
  • Edges: PFI 0
  • Count Direction: PFI 2
  • Edges: PFI 3
  • Count Direction: PFI 5
Pulse Width Measurement | PFI 1 | PFI 4
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 1 | PFI 4
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 0 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 0 | PFI 3
Semiperiod Measurement | PFI 1 | PFI 4
Two-Edge Separation Measurement
  • Start: PFI 2
  • Stop: PFI 1
  • Start: PFI 5
  • Stop: PFI 4

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 6 | PFI 7
Parent topic: Connecting Counter Signals


68-Pin M Series Signal Connections for Counters

The following table lists the default input terminals for various counter measurements on M Series devices, including M Series USB devices, such as the NI USB 6259 screw terminal and NI USB-6229 BNC devices. You can use a different PFI line for any of the input terminals. To change the PFI input for a measurement, use the NI-DAQmx channel attributes/properties.

Measurement | Ctr0 | Ctr1
Count Edges
  • Edges: PFI 8
  • Count Direction: PFI 10
  • Edges: PFI 3
  • Count Direction: PFI 11
Pulse Width Measurement | PFI 9 | PFI 4
Period/Frequency Measurement (Low Frequency with One Counter) | PFI 9 | PFI 4
Period/Frequency Measurement (High Frequency with Two Counters) | PFI 8 | PFI 3
Period/Frequency Measurement (Large Range with Two Counters) | PFI 8 | PFI 3
Semiperiod Measurement | PFI 9 | PFI 4
Two-Edge Separation Measurement
  • Start: PFI 10
  • Stop: PFI 9
  • Start: PFI 11
  • Stop: PFI 4
Position Measurement
  • A: PFI 8
  • B: PFI 10
  • Z: PFI 9
  • A: PFI 3
  • B: PFI 11
  • Z: PFI 4

The following table lists the output terminals for counter output. You can use a different PFI line for any of the output terminals.

Ctr0 | Ctr1
PFI 12 | PFI 13

Some M Series devices, including the NI 6010, NI 6154, NI 6221 (37-pin), and NI 623x, use the 37-pin DSUB connector. These devices have different counter terminal defaults. Refer to the 37-Pin DSUB Signal Connections for Counters for the default input terminals on these devices. Bus-powered M Series devices, such as the NI USB-621x devices, also have different counter terminal defaults. Refer to the Bus-Powered M Series Signal Connections for Counters for the default input terminals on these devices.

Parent topic: Connecting Counter Signals
Related reference
37-Pin DSUB Signal Connections for Counters
Bus-Powered M Series Signal Connections for Counters


Counter Internal Routing Diagrams

This section contains routing diagrams that illustrate the internal counter routing for AO Series, C Series with CompactDAQ chassis, E Series, M Series, S Series, TIO, and X Series devices.

Parent topic: Counters
Related concepts
AO Series, E Series, S Series Counter Internal Routing Diagram
C Series with the NI cDAQ-9172 Chassis, M Series, and TIO Counter Internal Routing Diagram
C Series Counter Internal Routing Diagram with the NI cDAQ-91xx Chassis
NI 661x Counter Internal Routing Diagram
X Series Counter Internal Routing Diagram


AO Series, E Series, S Series Counter Internal Routing Diagram

The following figure shows the internal routing for DAQ devices with the STC counter/timer such as E Series devices. The black circles represent terminals.

Parent topic: Counter Internal Routing Diagrams


C Series with the NI cDAQ-9172 Chassis, M Series, and TIO Counter Internal Routing Diagram

The following figure shows the routing for DAQ devices that use the TIO counter/timer such as NI 66xx devices, M Series devices, and C Series devices with the NI cDAQ-9172 chassis.

You can use any PFI line on your device. However, there are preferred PFI lines that do not require extra internal resources when used.

Parent topic: Counter Internal Routing Diagrams
Related concepts
Routing Considerations for TIO Devices


X Series Counter Internal Routing Diagram

The following figure shows the internal routing for DAQ devices with the STC III counter/timer such as X Series devices. The black circles represent terminals.

Parent topic: Counter Internal Routing Diagrams


C Series Counter Internal Routing Diagram with the NI cDAQ-91xx Chassis

The following figure shows the internal routing for C Series devices used in a NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 chassis. The figure shows direct routes available. Indirect routes are available as well, but use extra internal resources. The black circles represent terminals.

Parent topic: Counter Internal Routing Diagrams


NI 661x Counter Internal Routing Diagram

The following figure shows the internal routing for NI 661x devices. The black circles represent terminals. These devices have eight counters which are paired together. Only counters 0 and 1 are shown in the illustration, but the remaining pairs (counters 2 and 3, counters 4 and 5, and counters 6 and 7) are routed identically.

Parent topic: Counter Internal Routing Diagrams


Counter Input Error Reporting with C Series, M Series USB, and NI ELVIS II Devices

With C Series, NI ELVIS II Family, and M Series USB devices (except bus-powered M Series devices), buffered counter input error reporting occurs every 128 samples for high-speed USB and every 16 samples for full-speed USB. When an error is detected, the task stops. To prevent the acquisition of incorrect samples, only data within either the 128- or 16-sample group is reported. For instance, if you attempt to acquire 256 samples, and an error occurs after sample 250, the task returns 128 samples instead of 249. If you attempt to acquire a number of samples less than or equal to 128 or 16 and an error occurs, the task returns no samples.

Parent topic: Counters
Related concepts
Self-Powered Versus Bus-Powered M Series USB Devices


Duplicate Count Prevention

Duplicate count prevention (or synchronous counting mode) ensures that a counter returns correct data in applications that use a slow or non-periodic external source. Duplicate count prevention applies to any counter application such as measuring frequency or period. In such applications, the counter should store the number of times an external Source pulses between rising edges on the Gate signal.

Parent topic: Counters

Example Application That Works Correctly (No Duplicate Counting)

The following figure shows a buffered period measurement that uses an external signal as the Source.

On the first rising edge of the Gate, the current count of 7 is stored. On the next rising edge of the Gate, the counter stores a 2 since two Source pulses occurred after the previous rising edge of Gate.

The counter synchronizes or samples the Gate signal with the Source signal. So the counter does not detect a rising edge in the Gate until the next Source pulse. In this example, the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate.

Example Application That Works Incorrectly (Duplicate Counting)

In the following figure, after the first rising edge of Gate, no Source pulses occur. So the counter does not write the correct data to the buffer.

Example Application That Prevents Duplicate Counting

With duplicate count prevention enabled, the counter synchronizes both the Source and Gate signals to the maximum timebase. By synchronizing to the timebase, the counter detects edges on the Gate even if the Source does not pulse. This enables the correct current count to be stored in the buffer even if no Source edges occur in between Gate signals. Refer to the following example.

Even if the Source pulses are long, the counter increments only once for each Source pulse.

Normally, the counter value and Counter n Internal Output signals change synchronously to the Source signal. With duplicate count prevention, the counter value and Counter n Internal Output signals change synchronously to the maximum timebase.

When To Use Duplicate Count Prevention

You should use duplicate count prevention if the following conditions are true.
  • You are making a counter measurement
  • You are using an external signal (such as PFI x) as the counter Source
  • The frequency of the external Source is 25% of your maximum timebase or less
  • You can have counter value and output to change synchronously with the maximum timebase

In all other cases, you should not use duplicate count prevention.

Enabling and Disabling Duplicate Count Prevention in NI-DAQmx

NI-DAQmx enables duplicate count prevention by default except in the following cases:

  • The input terminal is an onboard timebase.
  • Prescaling is enabled.
  • The timing type is on demand.
  • The CtrOutEvent.OutputTerm attribute/property is used in your application.

You can enable and disable duplicate count prevention in NI-DAQmx with the CI.DupCountPrevention attribute/property.


Incomplete Sample Detection

When performing a buffered time measurement of a digital signal, the initial sample is often invalid. The following devices detect such samples and discard them.

  • Bus-powered M Series USB devices
  • Parallel digital I/O modules connected to NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 chassis. Refer to Digital I/O Considerations for C Series Devices.
  • NI 661x devices
  • X Series devices
Parent topic: Counters
Related concepts
Configuring a Time-Based Measurement in NI-DAQmx
Digital I/O Considerations for C Series Devices


Prescaling

Prescaling allows the counter to count a signal that is faster than the maximum timebase of the counter. The TIO counters offer 8X and 2X prescaling on each counter. You can disable prescaling. Each prescaler consists of a small, simple counter that counts to eight (or two) and rolls over. This counter is specifically designed for this application and can count signals that are faster than the general purpose counters. The CtrN source signal on the general purpose counter is the divided signal from the simple counter.

Prescaling is for two-counter period and frequency measurements in which the measurement is made on a continuous, repetitive signal. The prescaling counter cannot be read; therefore, you cannot determine how many edges have occurred since the previous roll-over. Prescaling can be also used for counting edges provided it is acceptable to have an error of up to seven counts when using 8X prescaling or one count when using 2X prescaling.

Parent topic: Counters


Pulse Measurement Support

The following devices support pulse measurements:

  • Parallel digital I/O modules connected to NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 chassis. Refer to Digital I/O Considerations for C Series Devices.
  • NI 661x devices
  • X Series devices
Parent topic: Counters
Related concepts
Configuring a Time-Based Measurement in NI-DAQmx
Digital I/O Considerations for C Series Devices


Sample Clock Timing Support for Time-Based Measurements

The following devices support Sample Clock timing for time-based measurements of digital signals, such as frequency, period, and two-edge separation measurements.

  • Bus-powered M Series USB devices
  • Parallel digital I/O modules connected to NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 chassis. Refer to Digital I/O Considerations for C Series Devices.
  • NI 661x devices
  • X Series Devices
Note Note You cannot use Sample Clock timing for semi-period measurements on X Series devices.
Parent topic: Counters
Related concepts
Configuring a Time-Based Measurement in NI-DAQmx
Digital I/O Considerations for C Series Devices


Digital Filtering

Digital filtering rejects state transitions that do not stay at a state for a specified amount of time. For example, for an edge counting measurement with digital filtering, the device does not count an edge if the pulse width is not at least the specified time. For digital input tasks, the device does not recognize that a signal changed from one state to another unless the signal remains at that state for the specified amount of time.

This section contains information about digital filtering for C Series, DIO, M Series, SC Express, TIO, and X Series devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Digital Filtering Considerations for C Series Devices
Digital Filtering Considerations for DIO Devices
Digital Filtering Considerations for M Series and C Series Devices with the NI cDAQ-9172 Chassis
Digital Filtering Considerations for SC Express Devices
Digital Filtering Considerations for TIO-Based Devices
Digital Filtering Considerations for X Series and NI 661x Devices


Digital Filtering Considerations for C Series Devices

For C Series devices, you can filter digital I/O lines and digital input signals.

Parent topic: Digital Filtering

Timing and Triggering Filters for Digital I/O Lines

You can configure digital filters on the device by choosing three fixed values (112.5 nS, 6.4 µS, 2.56 mS) or a custom filter value. The custom filter value must be the same for all lines across the device. For example, if you choose a filter value of 2 µS for PFI 0, any other filterable line on the device can only choose from the three fixed values and the 2 µs value selected for the custom filter. For each digital line or input terminal, there are four attributes/properties associated with these digital filters: Digital Filter Enable, Digital Filter Minimum Pulse Width, Digital Filter Timebase Source, and Digital Filter Timebase Rate.

When you set the Digital Filter Enable to true, you must also configure the Digital Filter Minimum Pulse Width attribute/property. When you select a filter value with the Digital Filter Minimum Pulse Width attribute/property, the device uses an internal 32-bit utility counter to generate the desired filter value. If you would like to generate the filter clock using your own external signal, you can use the Digital Filter Timebase Source and Digital Filter Timebase Rate attributes/properties. You must configure both to use an external signal as the source for the digital filter. The Digital Filter Minimum Pulse Width attribute/property represents the minimum value that is guaranteed to be passed into the device. The maximum pulse width guaranteed to be blocked by the device is one filter clock tick smaller than the minimum pulse width guaranteed to pass the filter.

The following table lists the attributes/properties for terminals that can be digitally filtered.

Type | Attribute/Property
Channel | Frequency Input Terminal
 | Period Input Terminal
 | Count Edges Input Terminal
 | Count Edges Count Direction
 | Position A Input Terminal
 | Position B Input Terminal
 | Position Z Input Terminal
 | Pulse Input Terminal (Time, Ticks, and Frequency)
 | Pulse Width Input Terminal
 | Two-Edge First Input Terminal
 | Two-Edge Second Input Terminal
 | Semi-Period Input Terminal
 | Counter Input Timebase Source (External Only)
 | Counter Output Timebase Source (External Only)
Timing | Sample Clock Source
Triggering | Arm Start Digital Edge Source
 | Pause Analog Level Source
 | Pause Analog Window Source
 | Pause Digital Level Source
 | Reference Analog Edge Source
 | Reference Analog Window Source
 | Reference Digital Edge Source
 | Start Analog Edge Source
 | Start Analog Window Source
 | Start Digital Edge Source

Filters for Digital Input Signals

Filters are also available on digital input lines, such as cDAQ1Mod1/port0/line0, but the filters do not support the fixed values mentioned previously or external timebase sources. The minimum filter pulse width for digital input lines is 50 nS and can be set in increments of 25 nS. All digital input lines on a module must use the same minimum filter pulse width. The maximum pulse width guaranteed to be rejected by the filter is half the pulse width guaranteed to pass the filter.


Digital Filtering Considerations for M Series and C Series Devices with the NI cDAQ-9172 Chassis

Digital debouncing filters are only supported on counter inputs. Each PFI line can independently select from three fixed values (125 ns, 6.425 µs, 2.55 ms). For each counter input attribute/property, there are two attributes/properties associated with digital debounce filtering: Digital Filter Enable and Digital Filter Minimum Pulse Width.

When you set the Digital Filter Enable to true, you must also configure the Digital Filter Minimum Pulse Width attribute/property. This value represents the minimum value that is guaranteed to pass into the counter/timer. Refer to your device documentation to determine the minimum pulse width guaranteed to be blocked.

The following table lists the counter input terminals that can be digitally filtered.

Type | Attribute/Property
Channel | Frequency Input Terminal
 | Period Input Terminal
 | Count Edges Input Terminal
 | Count Edges Count Direction
 | Position A Input Terminal
 | Position B Input Terminal
 | Position Z Input Terminal
 | Pulse Width Input Terminal
 | Two-Edge First Input Terminal
 | Two-Edge Second Input Terminal
 | Semi-Period Input Terminal
 | Counter Input Timebase Source
 | Counter Output Timebase Source
Timing | Sample Clock Source
Triggering | Start Trigger Source
 | Pause Trigger Source
 | Arm Start Trigger Source
Parent topic: Digital Filtering
Related concepts
Digital Filtering Considerations for C Series Devices


Digital Filtering Considerations for DIO Devices

Digital filtering is enabled by default on all isolated DIO devices that support digital filtering. The default minimum pulse width is 0.1 ms or 100 µs. Refer to the following table for a list of devices and their digital filtering settings.

Digital Filtering Setting Devices
Digital Filtering Enabled by Default
  • NI PCI-6510
  • NI PCI-6511
  • NI PCI-6514
  • NI PCI-6515
  • NI PCI-6518
  • NI PCI-6519
  • NI PCI-6527
  • NI PCI-6528
  • NI PXI-6511
  • NI PXI-6514
  • NI PXI-6515
  • NI PXI-6527
  • NI PXI-6528
  • NI PXI-6529
  • NI USB-6525
Digital Filtering Disabled by Default
  • NI PCI-6509
  • NI PCIe-6509
  • NI PXI-6509
Digital Filtering Not Supported
  • NI PCI-6503
  • NI PCI-6512
  • NI PCI-6513
  • NI PCI-6516
  • NI PCI-6517
  • NI PCI-DIO-96
  • NI PXI-6508
  • NI PXI-6512
  • NI PXI-6513
  • NI USB-6501
Parent topic: Digital Filtering


Digital Filtering Considerations for TIO-Based Devices

Note Note For digital filtering with NI 661x devices, refer to Digital Filtering Considerations for X Series and NI 661x Devices.

There are two methods for filtering and synchronizing digital signals. One method is to synchronize the input signal to the maximum onboard timebase on the device. To do this, set Digital Synchronization Enable to true.

The other method is to pass the input of any PFI line through a digital debouncing filter. Each PFI line can independently select from four fixed values (5 µs, 1 µs, 500 ns, 100 ns) and one custom filter value. The custom filter value must be the same for each PFI line. That is, if you choose a filter value of 2 µs for a PFI line, other PFI lines on the device at the same time can only choose from the four fixed values and the 2 µs value selected as the custom filter value. For each counter input property, there are four attributes/properties associated with digital debounce filtering: Digital Filter Enable, Digital Filter Minimum Pulse Width, Digital Filter Timebase Source, and Digital Filter Timebase Rate.

When you set the Digital Filter Enable to true, you must also configure the Digital Filter Minimum Pulse Width attribute/property. This value represents the minimum value that is guaranteed to pass into the TIO. The minimum pulse width guaranteed to be blocked is one-half of the Digital Filter Minimum Pulse Width attribute/property. When you select a custom filter value with the Minimum Pulse Width attribute/property, NI-DAQmx uses an internal 32-bit utility counter to generate the desired filter value. If you would like to generate the filter clock using your own external signal, you can use the Digital Filter Timebase Source and Digital Filter Timebase Rate attributes/properties. You must configure both to use an external signal as the source for the digital filter.

You cannot set both Digital Filter Enable and Digital Synchronization Enable to true at the same time. You can use only one of these digital filtering methods at a time.

The following table lists the counter input terminals that can be digitally filtered.

Type | Attribute/Property
Channel | Frequency Input Terminal
 | Period Input Terminal
 | Count Edges Input Terminal
 | Count Edges Count Direction
 | Position A Input Terminal
 | Position B Input Terminal
 | Position Z Input Terminal
 | Pulse Width Input Terminal
 | Two-Edge First Input Terminal
 | Two-Edge Second Input Terminal
 | Semi-Period Input Terminal
 | Counter Input Timebase Source
 | Counter Output Timebase Source
Timing | Sample Clock Source
Triggering | Start Trigger Source
 | Pause Trigger Source
 | Arm Start Trigger Source
Parent topic: Digital Filtering


Digital Filtering Considerations for X Series and NI 661x Devices

For X Series and NI 661x devices, you can filter digital I/O lines and input signals.

You can configure digital filters on the device by choosing three fixed values (90 nS, 5.12 µS, 2.56 mS). For each digital line or input terminal, there are four attributes/properties associated with these digital filters: Digital Filter Enable, Digital Filter Minimum Pulse Width, Digital Filter Timebase Source, and Digital Filter Timebase Rate.

When you set the Digital Filter Enable to true, you must also configure the Digital Filter Minimum Pulse Width attribute/property. This value represents the minimum value that is guaranteed to be passed into the device. The maximum pulse guaranteed to be blocked by the device varies by digital line. Refer to your device documentation for details. When you select a custom filter value with the Minimum Pulse Width attribute/property, NI-DAQmx uses an internal 32-bit utility counter to generate the desired filter value. If you would like to generate the filter clock using your own external signal, you can use the Digital Filter Timebase Source and Digital Filter Timebase Rate attributes/properties. You must configure both to use an external signal as the source for the digital filter.

When using digital filtering on port 0, you can enable bus mode using the Enable Bus Mode attribute/property. When enabled, the device observes changes to multiple lines as a single change if these conditions are met:

  • The skew between them is less than the minimum pulse width of the filter.
  • The lines remain stable for an additional minimum pulse width of the filter.

When using any other signal on the device that supports filtering (excluding port 0), you can select a custom filter value in addition to the three fixed values mentioned previously. The custom filter value must be the same for all lines across the device. For example, if you choose a filter value of 2 µS for PFI 0, any other filterable line on the device can only choose from the three fixed values and the 2 µs value selected for the custom filter.

The following table lists the attributes/properties for terminals that can be digitally filtered.

Type | Attribute/Property
Channel | Digital Input Channel
 | Frequency Input Terminal
 | Period Input Terminal
 | Count Edges Input Terminal
 | Count Edges Count Direction
 | Position A Input Terminal
 | Position B Input Terminal
 | Position Z Input Terminal
 | Pulse Input Terminal
 | Pulse Width Input Terminal
 | Two-Edge First Input Terminal
 | Two-Edge Second Input Terminal
 | Semi-Period Input Terminal
 | Counter Input Timebase Source
 | Counter Output Timebase Source
Timing | Sample Clock Source
 | AI Convert Clock Source
Triggering | Arm Start Trigger Source
 | Pause Analog Level Source
 | Pause Analog Window Source
 | Pause Trigger Source
 | Reference Analog Edge Source
 | Reference Analog Window Source
 | Reference Digital Edge Source
 | Start Analog Edge Source
 | Start Analog Window Source
 | Start Trigger Source
Parent topic: Digital Filtering


Digital Filtering Considerations for SC Express Devices

For SC Express devices, you can filter timing/triggering input signals.

You can configure digital filters on the device by choosing three fixed values (90 ns, 5.12 µs, 2.56 ms). For each digital line or input terminal, there are four attributes/properties associated with these digital filters: DI.DigFltr.Enable, DI.DigFltr.MinPulseWidth, DI.DigFltr.TimebaseSrc, and DI.DigFltr.TimebaseRate.

When you set the DI.DigFltr.Enable to true, you must also configure the DI.DigFltr.MinPulseWidth attribute/property. This value represents the minimum value that is guaranteed to be passed into the device. When you select a custom filter value with the DI.DigFltr.MinPulseWidth attribute/property, NI-DAQmx uses an internal 32-bit utility counter to generate the desired filter value.

You can select a custom filter value in addition to the three fixed values mentioned previously. The custom filter value must be the same for all lines across the device. For example, if you choose a filter value of 2 µs for PFI 0, any other filterable line on the device can only be set to one of the three fixed values or the 2 µs value selected for the custom filter.

The following table lists the attributes/properties for terminals that can be digitally filtered.

Type | Attribute/Property
Timing | Sample Clock Source (SampClk.Src)
Triggering | Pause Digital Level Source (Pause.DigLvl.Src)
 | Reference Analog Edge Source (Ref.AnlgEdge.Src)
 | Reference Analog Window Source (Ref.AnlgWin.Src)
 | Reference Digital Edge Source (Ref.DigEdge.Src)
 | Start Digital Edge Source (Start.DigEdge.Src)
Parent topic: Digital Filtering


Digital I/O

This section contains information specific to DIO devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Change Detection
Digital Filtering Considerations for C Series Devices
Burst Handshaking Timing Defaults for NI 653x Devices
Handshaking Line Configuration
Handshake Timing Defaults
Watchdog Timers
Related reference
Sample Clock Timing for Digital I/O
Handshake Timing Devices
Burst Handshake Timing for Digital I/O


Change Detection

This section contains information about change detection for C Series, DIO, and M Series devices.

Parent topic: Digital I/O
Related concepts
Change-Detection Considerations for C Series and M Series Devices
Change Detection Considerations for NI 6527 Devices


Change Detection Considerations for NI 6527 Devices

The ChangeDetect.Overflowed attribute/property uses the change detection overflow circuitry on a DIO device to determine if an overflow occurred. The NI 6527 change detection overflow circuitry does not detect an overflow if a single rising edge and a single falling edge are detected prior to reading a sample. It will detect overflows if two rising edges or two falling edges occur prior to reading a sample.

Parent topic: Change Detection


Change-Detection Considerations for C Series and M Series Devices

When performing a buffered change-detection task with an M Series device or an NI CompactDAQ system, the parallel digital input circuitry is automatically reserved and used for the task. Non-buffered tasks, including hardware-timed single point, do not reserve or use the parallel digital input circuitry.

Parent topic: Change Detection


Digital I/O Considerations for C Series Devices

Digital I/O module capabilities depend on the type of digital signals that the module can measure or generate and the chassis the module is used in.

The NI 93751, NI 9403, NI 9425, NI 9426, NI 9476, NI 9477, and NI 9478 are serial digital I/O modules.

The NI 9344, NI 9401, NI 9402, NI 9411, NI 9421, NI 9422, NI 9423, NI 9435, NI 9436, NI 9437, NI 9472, NI 9474, NI 9475, NI 9481, NI 9482, and NI 9485 are parallel digital I/O modules.

The following table shows what types of tasks these modules can perform in the different chassis.

Chassis Tasks
NI cDAQ-9172 Serial and parallel modules:
  • Software-timed digital input/output tasks
Parallel modules:
  • Hardware-timed digital input/output tasks (when used in slots 1 through 4)
  • Counter/timer tasks (when used in slots 5 and 6)
  • Accessing PFI signal tasks (when used in slots 5 and 6)
NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 Serial and parallel modules:
  • Software and hardware-timed digital input/output tasks2
Parallel modules:
  • Counter/timer tasks
  • Accessing PFI signal tasks (can be used in up to two slots)
Parent topic: Digital I/O
1 The NI 9344, NI 9375, NI 9436, and NI 9437 are not supported in the NI cDAQ-9172.
2 Timed digital input/output restrictions:
  • You cannot use parallel and serial modules together on the same hardware timed task, unless they are in separate cDAQ chassis using multichassis device tasks.
  • You cannot use serial modules for triggering.
  • You cannot do both static and timed tasks at the same time on a single serial module.
  • You can only do hardware timing in one direction at a time on a serial module.


Sample Clock Timing for Digital I/O

You can use sample clock timing for digital I/O on the following devices.

AO Series1

  • NI 673x

C Series

  • NI 9132
  • NI 9133
  • NI 9134
  • NI 9135
  • NI 9136
  • NI 9137
  • NI 9138
  • NI 9139
  • NI 9171
  • NI 91721, 2
  • NI 9174
  • NI 9178
  • NI 9179
  • NI 9181
  • NI 9184
  • NI 9188
  • NI 9188XT
  • NI 9191

M Series1

  • NI 622x
  • NI 625x
  • NI 628x

S Series1

  • NI 6115
  • NI 6120
  • NI 6132
  • NI 6133

NI 653x

  • NI PCI-6533 (DIO-32HS)
  • NI PXI-6533
  • NI PCI-6534
  • NI PXI-6534
  • NI PCIe-6535
  • NI PXIe-6535
  • NI PCIe-6536
  • NI PXIe-6536
  • NI PCIe-6537
  • NI PXIe-6537

NI 661x Devices

  • NI 6612
  • NI 6614

X Series Devices

All X Series devices support sample clock timing for digital I/O.

Parent topic: Digital I/O
Related concepts
Digital I/O Considerations for C Series Devices
1 There is no dedicated onboard sample clock for digital I/O on these devices. You must use a different clock, typically the AI or AO Sample Clock.
2 Parallel digital I/O devices support sample clock timing. If you are using the NI cDAQ-9172 chassis, you can only use slots 1, 2, 3, or 4. Refer to Digital I/O Considerations for C Series for more information.


Handshake Timing Devices

You can use handshake timing for digital I/O on the following devices:

  • NI PCI-6025E
  • NI PCI-6533 (DIO-32HS)
  • NI PCI-6534
  • NI PCI-DIO-24
  • NI PCI-DIO-96
  • NI PCIe-6535
  • NI PCIe-6536
  • NI PCIe-6537
  • NI PXI-6025E
  • NI PXI-6508
  • NI PXI-6533
  • NI PXI-6534
  • NI PXIe-6535
  • NI PXIe-6536
  • NI PXIe-6537
Parent topic: Digital I/O


Burst Handshaking Timing Defaults for NI 653x Devices

The following table lists the default terminals used for burst handshake timing.

Note Note The NI 6533 and NI 6534 have two timing engines, Timing Engine 1 and Timing Engine 0. Each timing engine is associated with PFI lines. The timing engine you use is determined by the digital lines you use. If the least significant port is Port 0, NI-DAQmx picks Timing Engine 0. If the least significant port is Port 2, NI-DAQmx picks Timing Engine 1.
Device | Pause Trigger Default | Ready for Transfer Event Default
NI PCI-6533 (DIO-32HS), NI PXI-6533, NI PCI-6534, NI PXI-6534 | PFI 2 (Timing Engine 0), PFI 3 (Timing Engine 1) | PFI 6 (Timing Engine 0), PFI 7 (Timing Engine 1)
NI PCIe-6535, NI PXIe-6535, NI PCIe-6536, NI PXIe-6536, NI PCIe-6537, NI PXIe-6537 | PFI 0 | PFI 1

The recommended sample clock terminal for burst handshake timing is PFI 4 (Timing Engine 0) or PFI 5 (Timing Engine 1).

Parent topic: Digital I/O


Burst Handshake Timing for Digital I/O

You can use burst handshake timing for digital I/O on the following devices:

  • NI PCI-6533 (DIO-32HS)
  • NI PCI-6534
  • NI PCIe-6535
  • NI PCIe-6536
  • NI PCIe-6537
  • NI PXI-6533
  • NI PXI-6534
  • NI PXIe-6535
  • NI PXIe-6536
  • NI PXIe-6537
Parent topic: Digital I/O


Handshaking Line Configuration

NI 6533/6534 devices have two timing engines, each of which use a set of default lines for handshaking and burst handshaking. You can specify a different timing engine to use the handshaking lines associates with that timing engine.

Parent topic: Digital I/O
Related concepts
NI 6533, 6534 Timing Engines
Handshake Timing Defaults
Burst Handshaking Timing Defaults for NI 653x Devices


Handshake Timing Defaults

The following table lists the default terminals used for handshake timing for NI 653x devices.

Note Note The NI 6533 and NI 6534 have two timing engines, Timing Engine 1 and Timing Engine 0. Each timing engine is associated with PFI lines. The timing engine you use is determined by the digital lines you use. If the least significant port is Port 0, NI-DAQmx picks Timing Engine 0. If the least significant port is Port 2, NI-DAQmx picks Timing Engine 1.
Device | Handshake Trigger Source Terminal Default | Handshake Event Output Terminal Default
NI PCI-6533 (DIO-32HS), NI PXI-6533, NI PCI-6534, NI PXI-6534 | PFI 2 (Timing Engine 0), PFI 3 (Timing Engine 1) | PFI 6 (Timing Engine 0), PFI 7 (Timing Engine 1)
NI PCIe-6535, NI PXIe-6535, NI PCIe-6536, NI PXIe-6536, NI PCIe-6537, NI PXIe-6537 | PFI 0 | PFI 1

The recommended sample clock terminal for burst handshake timing is PFI 4 (Timing Engine 0) or PFI 5 (Timing Engine 1).

Parent topic: Digital I/O


Watchdog Timers

Watchdog timers are a hardware feature that you can use to detect a failure in the software controlling the device. Software failures could include a system crash or a loop rate that is slower than you intend. To use a watchdog timer, you must use a watchdog timer task. When you create a watchdog timer task, you specify the timeout value for the watchdog timer and a set of expiration states for output physical channels on the device. The channels go to those expiration states if the watchdog timer expires. In addition, you cannot perform any actions with the task until you reset it.

Your application must continuously reset the watchdog timer to prevent it from expiring. For example, if you have a digital I/O application, and you expect a loop in the application to acquire and analyze data 10 times per second, you should set the watchdog timer to expire in 100 ms and reset the timer inside the digital I/O loop. If the loop does not execute once every 100 ms, the watchdog timer expires and the device goes into the expired state. You must then clear the expiration or reset the device.

Also, you can use the Expiration Trigger to cause the watchdog timer to expire. Set the timeout of the watchdog timer task to -1 to disable expiration due to timeout if you want the Expiration Trigger to be the only mechanism to cause expiration.

Note Note For X Series devices, PFI lines used for routing either by the Connect Terminals function/VI or by a task and also guarded by a watchdog timer will go to their assigned safe states if the watchdog timer expires. The routes or tasks using the PFI lines will not necessarily be notified of the expiration.
Note Note For the NI 9260, all channels on a watchdog task must use the same expiration state. If the expiration state is set to Voltage, you can specify different voltage levels for each channel. If the expiration state is set to No Change, the channels revert to their idle output behavior on expiration.
Parent topic: Digital I/O


Pause Triggering

This section contains information about Pause Triggering for AO Series, DSA, E Series, M Series, S Series, SC Express, and TIO devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Pause Trigger Considerations for AO Series Devices
Pause Trigger Considerations for C Series Devices
Pause Trigger Considerations for DSA Devices
Pause Trigger Considerations for E Series and M Series Devices
Pause Trigger Considerations for S Series Devices
Pause Trigger Considerations for SC Express Devices
Pause Trigger Considerations for TIO Devices


Pause Trigger Considerations for AO Series Devices

The source of your sample clock can affect when your generation resumes after the deassertion of a Pause Trigger.

Parent topic: Pause Triggering

Analog Output

When you generate analog output signals, the generation pauses as soon as the Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the generation resumes as soon as the Pause Trigger is deasserted. The NI 6733 and NI 6251 behave as if an external clock is being used, even if the source of the sample clock is the onboard clock. For these devices, the generation resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received.

If you are using any signal other than the onboard clock as the source of your sample clock, the generation resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received, as shown in the following figure.

Counters

Continuous pulse-train generation: The pulse-train generation pauses as soon as the Pause Trigger is asserted, not at the end of a pulse. The pulse train resumes after the Pause Trigger is deasserted. A Pause Trigger elongates either the high or low pulse depending on which one was being generated at the time the Pause Trigger was asserted.

Nonbuffered edge counting: The counter stops counting edges as soon as the Pause Trigger is asserted and resumes counting edges after the Pause Trigger is deasserted.


Pause Trigger Considerations for C Series Devices

The source of your sample clock often can affect when your acquisition or generation pauses and resumes with the assertion and deassertion of a Pause Trigger.

Parent topic: Pause Triggering

Counter Input for the NI 9361

When you acquire counter input signals, the acquisition pauses as soon as Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the acquisition resumes after the Pause Trigger is deasserted, and the leftover period (A) elapses. The leftover period is the unknown time in the sample clock period in which the pause trigger occurred. In the following image, T represents the signal period and A represents the unknown time between the clock pulse and the pause trigger.

If you are using any signal other than the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received as shown in the following figure.

To pause an edge counting task, use the CountEdges.Gate attributes/properties.


Pause Trigger Considerations for DSA Devices

DSA devices do not support Pause Triggering.

Parent topic: Pause Triggering


Pause Trigger Considerations for E Series and M Series Devices

The source of your sample clock often can affect when your acquisition or generation pauses and resumes with the assertion and deassertion of a Pause Trigger.

Parent topic: Pause Triggering

Analog Input

When you measure analog input signals and the Pause Trigger is asserted, the current sample across all channels finishes before pausing. For instance, if you are sampling four channels and the second channel is being sampled at the time the Pause Trigger is asserted, the second, third, and fourth channels complete their sample before the acquisition pauses. If you are using the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received as shown in the following figure.

Analog Output

When you generate analog output signals, the generation pauses as soon as the Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the generation resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the generation resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received as shown in the following figure.

Counters

Continuous pulse-train generation: The pulse-train generation pauses as soon as the Pause Trigger is asserted, not at the end of a pulse. The pulse train resumes after the Pause Trigger is deasserted. A Pause Trigger elongates either the high or low pulse depending on which one was being generated at the time the Pause Trigger was asserted.

Nonbuffered edge counting: The counter stops counting edges as soon as the Pause Trigger is asserted and resumes counting edges after the Pause Trigger is deasserted.


Pause Trigger Considerations for S Series Devices

The source of your sample clock often can affect when your acquisition or generation pauses and resumes with the assertion and deassertion of a Pause Trigger.

Parent topic: Pause Triggering

Analog Input and Analog Output

When you generate analog output signals or acquire analog input signals, the generation/acquisition pauses as soon as the Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the generation/acquisition resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the generation/acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received as shown in the following figure.

Pause triggers also require special consideration when used on a device with a pipelined ADC. See Timing Considerations for S Series for how pipelined ADCs and Pause Triggers can affect your measurement.

Related concepts
Timing Considerations for S Series

Counters

Continuous pulse-train generation: The pulse-train generation pauses as soon as the Pause Trigger is asserted, not at the end of a pulse. The pulse train resumes after the Pause Trigger is deasserted. A Pause Trigger elongates either the high or low pulse depending on which one was being generated at the time the Pause Trigger was asserted.

Nonbuffered edge counting: The counter stops counting edges as soon as the Pause Trigger is asserted and resumes counting edges after the Pause Trigger is deasserted.

Note Note The NI 6154 does not support pause triggering.


Pause Trigger Considerations for TIO Devices

Counters

Parent topic: Pause Triggering

Nonbuffered Edge Counting

The counter stops counting edges as soon as the Pause Trigger is asserted and resumes counting edges after the Pause Trigger is deasserted.

Continuous Pulse-Train Generation

The pulse-train generation pauses as soon as the Pause Trigger is asserted, not at the end of a pulse. The pulse train resumes after the Pause Trigger is deasserted. A Pause Trigger elongates either the high or low pulse depending on which one was being generated at the time the Pause Trigger was asserted.


Pause Trigger Considerations for SC Express Devices

Note Note NI 433x devices and the NI 4340 do not support pause triggering.

The source of your sample clock often can affect when your acquisition pauses and resumes with the assertion and deassertion of a Pause Trigger.

Parent topic: Pause Triggering

Analog Input and Analog Output for Simultaneous Sampling SC Express Devices

When you generate analog output signals or acquire analog input signals on a simultaneous sampling SC Express device, such as the NI 4322 or NI 4300, the generation/acquisition pauses as soon as the Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the generation/acquisition resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the generation/acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received, as shown in the following figure.

Analog Input for the NI 4353

The NI 4353 has three ADCs. There is ADC0, which is for the even analog input channels (for instance, ai4, ai6, and ai10), ADC1, which is for the odd analog input channels (for instance, ai1, ai3, and ai5), and ADC2, which is for the cold-junction compensation channels.

If the Pause Trigger is asserted, and you sample from multiple cold-junction compensation channels, multiple odd-numbered analog input channels, or multiple even-numbered analog output channels, the current sample across all channels finishes before pausing. For instance, if you are sampling eight channels, ai0:7, and ai4 is being sampled when the Pause Trigger is asserted, the remaining four channels complete their sample before the acquisition pauses. If you are using the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received, as shown in the following figure.

Analog Input for the NI 4357

The NI 4357 has five ADCs. The ADCs are staggered in the following ways:
  • ADC0 maps to the analog input channels ai0, ai5, ai10, ai15
  • ADC1 maps to the analog input channels ai1, ai6, ai11, ai16
  • ADC2 maps to the analog input channels ai2, ai7, ai12, ai17
  • ADC3 maps to the analog input channels ai3, ai8, ai13, ai18
  • ADC4 maps to the analog input channels ai4, ai9, ai14, ai19

If the Pause Trigger is asserted, and you sample from multiple channels on the same ADC, the current sample across all channels finishes before pausing. For instance, if you are sampling eight channels, ai0:7, and ai4 is being sampled when the Pause Trigger is asserted, the remaining four channels complete their sample before the acquisition pauses. If you are using the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted.

If you are using any signal other than the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received, as shown in the following figure.


Physical Channels

This section contains information about physical channels for AO Series, bus-powered M Series, C Series, E Series, M Series, Network DAQ, NI 6010, NI 6154, NI 6221 (37-pin), NI 623x, NI 6533/6534, NI 6535/6536/6537, NI ELVIS II Family, S Series, SC Express, SCXI, SCC, TIO, USB DAQ, and X Series devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
AO Series Physical Channels
Bus-Powered M Series Physical Channels
C Series Physical Channels
E Series Physical Channels
M Series
USB and Network DAQ Physical Channels
NI 6010 Physical Channels
NI 6154 Physical Channels
NI 6221 (37-Pin) Device Physical Channels
NI 623x Physical Channels
NI 6533/6534 Device Physical Channels
NI 6535/6536/6537 Physical Channels
NI ELVIS II Family Physical Channels
S Series Physical Channels
SC Express Physical Channels
SCXI and SCC Physical Channels
TIO Physical Channels
X Series Physical Channels


AO Series Physical Channels

Dev1 in physical channel names is the default device name for AO Series devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
AO Series, E Series, and S Series Signal Connections for Counters

Analog Output

An AO Series device has between four and 32 analog output physical channels named Dev1/ao0 to Dev1/ao31.

With static AO devices, channels 0-15 are voltage output, and channels 16-31 are current output.

Digital Input and Output

All AO Series devices have eight lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line7. These lines belong to a single port, and the physical channel Dev1/port0 refers to all eight lines at once.

Counter Input and Output

All AO Series devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are three primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | CTR 0 OUT
Dev/ctr1 | PFI 3 | PFI 4 | CTR 1 OUT


C Series Physical Channels

In physical channel names, cDAQ1Mod1 is the default device name for a C Series device plugged into a USB or Standalone NI CompactDAQ chassis, where cDAQ1 is the default chassis device name, and Mod1 refers to the slot number. For C Series devices plugged into a network NI CompactDAQ chassis, such as the NI cDAQ-9188, the default chassis device name is the host name of the chassis. You can change these names in MAX.

Parent topic: Physical Channels
Related concepts
Digital I/O Considerations for C Series Devices
Related reference
C Series Signal Connections for Counters

Analog Input

The following table lists the number and naming of analog input physical channels for C Series devices.

Device | Number of Channels | Naming
NI 9218, NI 9251 | 2 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai1
NI 9225, NI 9230, NI 9232, NI 9246, NI 9247 | 3 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai2
NI 9210, NI 9211, NI 9215, NI 9217, NI 9219, NI 9222, NI 9223, NI 9227, NI 9229, NI 9233, NI 9234, NI 9237, NI 9238, NI 9239 | 4 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai3
NI 9242, NI 9244 | 4 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai2, cDAQ1Mod1/neutral
NI 9201, NI 9203, NI 9212, NI 9216, NI 9221, NI 9226, NI 9235, NI 9236 | 8 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai7
NI 9207, NI 9208, NI 9213, NI 9214 , NI 9220 | 16 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai15
NI 9205, NI 9206 | 32 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai31

On the NI 9205 and NI 9206, you can configure channels 0-7 and 16-23 as the positive channel of a differential pair. If N is this channel, channel N + 8 is the negative input of the pair. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input. Use only the physical channel name of the positive channel (not both) when creating a differential channel.

You can use channels from multiple analog input C Series devices in the same NI-DAQmx task.

  • Only one analog input task per NI cDAQ-9172 chassis can run at a given time.
  • Up to three analog input tasks can run at a given time per chassis in an NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis.
  • Up to two analog input tasks with a C Series Delta-Sigma device can run at a given time per chassis in an NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis.
Related concepts
C Series Device Groupings

Strain and Wheatstone Bridge Measurements

The NI 9235, NI 9236, and NI 9237 support only the AI Strain Gage, AI Force Bridge, AI Pressure Bridge, AI Torque Bridge, AI Bridge (V/V), and AI Custom Voltage With Excitation channel types.

When using the NI 9218, NI 9219, NI 9235, NI 9236, or NI 9237 with an AI Custom Voltage With Excitation channel, you must set the AI.Excit.UseForScaling attribute/property to true. This attribute/property causes the channel to return ratiometric data: Vin/Vex. The NI 9219, NI 9235, NI 9236, and NI 9237 modules perform this division in hardware.

For the NI 9219, NI-DAQmx requires the AI.Excit.Val attribute/property to be set to 2.5 V for AI Strain Gage and AI Custom Voltage With Excitation channel types and to 500 µA for resistance and RTD measurements. The actual excitation voltage or current output by the NI 9219 varies with the sensor resistance or the load being measured.

For the NI 9218, NI-DAQmx requires the AI.Excit.Val attribute/property to be set to 3.3 V or 2 V for AI Strain Gage and AI Custom Voltage With Excitation (bridge mode), to 12 V for AI Custom Voltage With Excitation (no bridge mode) for powered sensors, and to 2 mA for IEPE.

NI 9218, NI 9219, NI 9235, NI 9236, and NI 9237 devices return a voltage ratio rather than a voltage. Therefore, use the AI.Bridge.InitialRatio attribute/property to specify the initial voltage ratio, or set the AI.Bridge.InitialVoltage attribute/property to the ratio Vin/Vex returned by the device, multiplied by Vex.

The NI 9219 does not have quarter bridge completion circuitry, which affects AI Strain Gage Quarter Bridge I channels and AI Custom Voltage With Excitation Quarter Bridge channels (but not AI Strain Gage Quarter Bridge II channels). With these channels, the NI 9219 performs a 2-wire resistance measurement on the active gage element, then NI-DAQmx uses software scaling to convert the resistance measurement into a bridge ratio. For these channels, the polynomial coefficients specified by the AI.DevScalingCoeff attribute/property convert unscaled data into Ohms, not into V/V. Likewise, the AI.Rng.High/AI.Rng.Low attributes/properties should be specified in units of Ohms, not V/V.

When the NI 9219 is in quarter bridge mode, you need to use the AI.Bridge.NomResistance attribute/property to control whether the channel uses the 120 Ω range or the 350 Ω range.

The NI 9218 has an internal full bridge. However, it can support quarter-bridge and half-bridge measurements with the proper accessories.

NI 9218 Powered Sensor Measurements

The NI 9218 supports powered sensor measurements. For voltage powered sensor measurements, you can use either the DAQmx Create Channel function/VI (the AI Custom Voltage with Excitation measurement type) with the Bridge Configuration set to No Bridge, or you can use the DAQmx Create Channel function/VI (voltage measurement type) with the AI.Excit.Val attribute/property. For current powered sensor measurements, you have to use the DAQmx Create Channel function/VI (current measurement type) with the AI.Excit.Val attribute/property.

Analog Output

The following table lists the number and naming of analog output physical channels for C Series devices.

Device | Number of Channels | Naming
NI 9260 | 2 | cDAQ1Mod1/ao0 to cDAQ1Mod1/ao1
NI 9263, NI 9265 | 4 | cDAQ1Mod1/ao0 to cDAQ1Mod1/ao3
NI 9264 | 16 | cDAQ1Mod1/ao0 to cDAQ1Mod1/ao15

You can use channels from multiple analog output C Series devices in the same analog output task. With the NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT, if the task is hardware-timed and uses only onboard memory, there is a limit of 16 channels per task, but if the task is software-timed or does not use only onboard memory, the number of channels is limited only by the number of devices. With the NI 9172, if the task is hardware-timed, there is a limit of 16 channels per task, but if the task is software-timed, the number of channels is limited only by the number of devices. Only one hardware-timed analog output task per chassis can run at a given time.

When using the the NI 9263, NI 9264, or NI 9265, you can run only one type of timing at a time. You can have one software-timed task per channel or one hardware-timed task running on a device at one time, but you cannot have a combination of timing on that device. For instance, you can run up to four software-timed tasks on an the NI 9265 concurrently, but running one hardware-timed task with one software-timed task generates an error.

When using the NI 9260, if you start a task that uses a different channel than the one you are currently using, the channel no longer in use reverts to the calibrated 0 V value.

Digital Input and Output

The following table lists the number, type, and naming of digital input/output lines for C Series devices.

Device | Lines | Type | Naming
NI 9244 | 4 | digital input | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line3
 | 4 | digital output | cDAQ1Mod1/port1/line0 to cDAQ1Mod1/port1/line3
NI 9402, NI 9435, NI 9481, 9482 | 4 | digital input and/or output | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line3
NI 9411 | 6 | digital input | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line5
NI 9401, NI 9421, NI 9422, NI 9423, NI 9472, NI 9474, NI 9475, NI 9485 | 8 | digital input and/or output | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line7
NI 9436, NI 9437 | 8 | digital input | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line7
NI 9375 | 16 | digital input | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line15
 | 16 | digital output | cDAQ1Mod1/port1/line0 to cDAQ1Mod1/port1/line15
NI 9478 | 16 | digital output | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line15
NI 9403, NI 9425, NI 9426, NI 9476, NI 9477 | 32 | digital input and/or output | cDAQ1Mod1/port0/line0 to cDAQ1Mod1/port0/line31
Note Note Digital I/O module capabilities depend on the type of digital signals that the module can measure or generate and the chassis the module is used in. Refer to Digital I/O Considerations for C Series for more information.

Chassis Counter Input and Output

The NI cDAQ-9172 has two counter/timers that are used with a C Series digital I/O device in slot 5 or 6. These are referred to by the physical channel names cDAQ1Mod5/ctr0, cDAQ1Mod5/ctr1, cDAQ1Mod6/ctr0, and cDAQ1Mod6/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the device I/O connector but instead to circuits within the chassis. The NI cDAQ-9172 chassis also has a 4-bit frequency output generator, referred to as cDAQ1Mod5/freqout and cDAQ1Mod6/freqout.

The NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT have four counters. You can use counters/timers with a C Series device in any slot. These chassis also have a 4-bit frequency output generator, referred to as cDAQ1Modx/freqout, where x is the slot in which the module is located.

Each counter has four primary terminals associated with it. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter/timers are only supported on parallel digital I/O modules. Refer to Digital I/O Considerations for C Series for more information.

The following table shows the counter terminal defaults for 8-channel DIO/DI/DO C Series devices.

PFI Signal | Physical Channel Name
PFI 0 | ctr0 src/ctr2 aux
PFI 1 | ctr0 gate/ctr2 out
PFI 2 | ctr0 aux/ctr2 gate/freqout
PFI 3 | ctr0 out/ctr2 src
PFI 4 | ctr1 src/ctr3 aux
PFI 5 | ctr1 gate/ctr3 out
PFI 6 | ctr1 aux/ctr3 gate
PFI 7 | ctr1 out/ctr3 src

The following table shows the counter terminal defaults for 6-channel DIO/DI/DO C Series devices.

PFI Signal | Physical Channel Name
PFI 0 | ctr0 src/ctr2 gate
PFI 1 | ctr0 gate/ctr2 aux/ctr2 out/freqout
PFI 2 | ctr0 aux/ctr0 out/ctr2 src
PFI 3 | ctr1 src/ctr3 gate
PFI 4 | ctr1 gate/ctr3 aux/ctr3 out
PFI 5 | ctr1 aux/ctr1 out/ctr3 src

The following table shows the counter terminal defaults for 4-channel DIO/DI/DO C Series devices.

PFI Signal | Physical Channel Name
PFI 0 | ctr0 src/ctr0 out/ctr2 aux/ctr3 gate
PFI 1 | ctr0 gate/ctr1 aux/ctr2 src/ctr2 out/freqout
PFI 2 | ctr0 aux/ctr1 gate/ctr3 src/ctr3 out
PFI 3 | ctr1 src/ctr1 out/ctr2 gate/ctr3 aux

Module Counter Input and Output

The following table lists the number, type, and naming of counter input lines for C Series counter modules.

Device | Counter | Type | Names
NI 9361 | 8 | Counter input | cDAQ1Mod1/ctr0 to cDAQ1Mod1/ctr7

There are 8 PFI lines, from PFI0 to PFI7. Each counter can use any of the input PFI lines to perform measurements. Two counters can use the same PFI line as inputs for their measurements, as long as the input configurations are the same for both counters.

The following table shows the terminal defaults for edge counting measurements for C Series counter modules.

Counter | Input terminal | Reset | Direction
ctr0 | PFI0 | PFI4 | PFI7
ctr1 | PFI1 | PFI5 | PFI6
ctr2 | PFI2 | PFI6 | PFI5
ctr3 | PFI3 | PFI7 | PFI4
ctr4 | PFI4 | PFI0 | PFI3
ctr5 | PFI5 | PFI1 | PFI2
ctr6 | PFI6 | PFI2 | PFI1
ctr7 | PFI7 | PFI3 | PFI0

The following table shows the terminal defaults for position measurements for C Series counter modules.

Counter | A | B | Z
ctr0 | PFI0 | PFI4 | PFI7
ctr1 | PFI1 | PFI5 | PFI6
ctr2 | PFI2 | PFI6 | PFI5
ctr3 | PFI3 | PFI7 | PFI4
ctr4 | PFI4 | PFI0 | PFI3
ctr5 | PFI5 | PFI1 | PFI2
ctr6 | PFI6 | PFI2 | PFI1
ctr7 | PFI7 | PFI3 | PFI0

The following table shows the terminal defaults for velocity measurements for C Series counter modules that support velocity measurements.

Counter | A | B
ctr0 | PFI0 | PFI4
ctr1 | PFI1 | PFI5
ctr2 | PFI2 | PFI6
ctr3 | PFI3 | PFI7
ctr4 | PFI4 | PFI0
ctr5 | PFI5 | PFI1
ctr6 | PFI6 | PFI2
ctr7 | PFI7 | PFI3

The following table shows the terminal defaults for frequency, period, duty cycle, and pulse width measurements for C Series counter modules.

Counter | Input Terminal
ctr0 | PFI0
ctr1 | PFI1
ctr2 | PFI2
ctr3 | PFI3
ctr4 | PFI4
ctr5 | PFI5
ctr6 | PFI6
ctr7 | PFI7

Connections for PFI lines should be based on the terminal configuration property. PFI + and PFI- should be connected in differential mode, and PFI + and COM should be connected for RSE. The default terminal configuration for all counter input terminals is RSE.


E Series Physical Channels

Dev1 in physical channel names is the default device name for E Series devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
AO Series, E Series, and S Series Signal Connections for Counters

Analog Input

A 16-channel E Series device has physical channels ranging from Dev1/ai0 to Dev1/ai15. You can configure only channels 0 through 7 in differential mode. When you configure a channel in differential mode, the channel is the positive input and channel plus eight is the negative input. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input.

A 64-channel E Series device has physical channels ranging from Dev1/ai0 to Dev1/ai63. You can configure channels in banks of every other eight beginning with 0 through 7 as the positive channel of a differential pair (0-7, 16-23, 32-39, and 48-55). If N is this channel, channel N + 8 is the negative input of the pair.

Use only the physical channel name of the positive channel when creating a differential channel (not both).

Analog Output

An E Series device that supports analog output has two analog output physical channels named Dev1/ao0 and Dev1/ao1.

Digital Input and Output

All E Series devices except the NI 6025E have eight lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line7. These lines belong to a single port, and the physical channel Dev1/port0 refers to all eight lines at once.

The NI 6025E has 32 lines of digital input and output with eight lines belonging to one of four ports. The names are of the form Dev1/port P/line0 through Dev1/port P/line7, where P ranges from 0 through 3. There are also four physical channel names that refer to all eight lines in a port at once of the form Dev1/port P, where P ranges from 0 through 3. There are two more physical channel names that refer to all the lines in multiple consecutive ports. They are both of the form Dev1/port P_N, where P is the port number of the lowest numbered port, and N is the total number of lines. All 32 lines at once can be configured as a single virtual channel with the physical channel name Dev1/port0_32. You can configure the two ports that can be handshaked as a single virtual channel by using the physical channel name Dev1/port1_16.

Counter Input and Output

All E Series devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are three primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | CTR 0 OUT
Dev/ctr1 | PFI 3 | PFI 4 | CTR 1 OUT


M Series

The section contains information about M Series Physical Channels, Bus-Powered M Series Physical Channels, NI 6221 (37-Pin) Device Physical Channels, and NI 623x Physical Channels.

Parent topic: Physical Channels
Related concepts
M Series Physical Channels
Bus-Powered M Series Physical Channels
NI 6221 (37-Pin) Device Physical Channels
NI 623x Physical Channels
Self-Powered Versus Bus-Powered M Series USB Devices


M Series Physical Channels

In physical channel names, Dev1 is the default device name for M Series devices. You can change these names in MAX.

Parent topic: M Series
Related reference
68-Pin M Series Signal Connections for Counters

Analog Input

Depending on your M Series device, you can have from 16 to 80 analog input channels. A 16-channel M Series device has physical channels ranging from Dev1/ai0 to Dev1/ai15, a 32-channel device from Dev1/ai0 to Dev1/ai31, and so on. You can configure the first eight channels as the positive channel of a differential pair. If N is this channel, channel N + 8 is the negative input of the pair. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input. For devices with more than 16 AI channels, 16-23, 32-39, 48-55, and 64-71 are also positive channels of a differential pair.

Use only the physical channel name of the positive channel (not both) when creating a differential channel.

Analog Output

An M Series device that supports two analog outputs has analog output physical channels named Dev1/ao0 and Dev1/ao1.

An M Series device that supports four analog outputs has analog output physical channels named Dev1/ao0, Dev1/ao1, Dev1/ao2, and Dev1/ao3.

Digital Input and Output

All M Series devices have eight, 16, or 32 lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line7, Dev1/port0/line0 through Dev1/port0/line15, or Dev1/port0/line0 through Dev1/port0/line31. These lines belong to a single port, and the physical channel Dev1/port0 refers to all eight or 32 lines at once. Port 0 can perform both hardware-timed and static digital operations.

M Series devices have two more ports, port 1 and port 2. Port 1 has eight digital I/O lines, Dev1/port1/line0 through Dev1/port1/line7. Port 2 has eight digital I/O lines, Dev1/port2/line0 through Dev1/port2/line7. Port 1 and port 2 can be used as static digital I/O lines or PFI lines, PFI 0..15. When any of PFI lines 0..15 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port1/line0
PFI 1 | Dev1/port1/line1
PFI 2 | Dev1/port1/line2
PFI 3 | Dev1/port1/line3
PFI 4 | Dev1/port1/line4
PFI 5 | Dev1/port1/line5
PFI 6 | Dev1/port1/line6
PFI 7 | Dev1/port1/line7
PFI 8 | Dev1/port2/line0
PFI 9 | Dev1/port2/line1
PFI 10 | Dev1/port2/line2
PFI 11 | Dev1/port2/line3
PFI 12 | Dev1/port2/line4
PFI 13 | Dev1/port2/line5
PFI 14 | Dev1/port2/line6
PFI 15 | Dev1/port2/line7

Physical channel Dev1/port2 refers to all eight lines, Dev1/port2/line0:7, at once.

Counter Input and Output

All M Series devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1 . Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | PFI 10 | PFI 12
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 11 | PFI 13


Bus-Powered M Series Physical Channels

In physical channel names, Dev1 is the default device name for M Series devices. You can change these names in MAX.

Parent topic: M Series
Related concepts
Self-Powered Versus Bus-Powered M Series USB Devices
Related reference
Bus-Powered M Series Signal Connections for Counters

Analog Input

Depending on your M Series device, you can have from 16 to 32 analog input channels. A 16-channel M Series device has physical channels ranging from Dev1/ai0 to Dev1/ai15, a 32-channel device from Dev1/ai0 to Dev1/ai31, and so on. You can configure the first eight channels as the positive channel of a differential pair. If N is this channel, channel N + 8 is the negative input of the pair. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input. For devices with more than 16 AI channels, 16-23, 32-39, 48-55, and 64-71 are also positive channels of a differential pair.

Use only the physical channel name of the positive channel (not both) when creating a differential channel.

Analog Output

An M Series device that supports two analog outputs has analog output physical channels named Dev1/ao0 and Dev1/ao1.

An M Series device that supports four analog outputs has analog output physical channels named Dev1/ao0, Dev1/ao1, Dev1/ao2, and Dev1/ao3.

Digital Input and Output

Most bus-powered M Series devices have two ports, port 0 and port 1. For devices with eight PFI lines, Port 0 has four digital input lines, Dev1/port0/line0 through Dev1/port0/line3, and port 1 has four digital output lines, Dev1/port1/line0 through Dev1/port1/line3. For devices with 16 PFI lines such as the NI 6218, Port 0 has eight digital input lines, Dev1/port0/line0 through Dev1/port0/line7, and port 1 has eight digital output lines, Dev1/port1/line0 through Dev1/port1/line7. You can use port 0 as static digital input lines or input PFI lines. You can use port 1 as static digital output lines or output PFI lines. When any of PFI lines 0..15 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port0/line0
PFI 1 | Dev1/port0/line1
PFI 2 | Dev1/port0/line2
PFI 3 | Dev1/port0/line3
PFI 4 | Dev1/port1/line0
PFI 5 | Dev1/port1/line1
PFI 6 | Dev1/port1/line2
PFI 7 | Dev1/port1/line3
PFI 8 | Dev1/port0/line4
PFI 9 | Dev1/port0/line5
PFI 10 | Dev1/port0/line6
PFI 11 | Dev1/port0/line7
PFI 12 | Dev1/port1/line4
PFI 13 | Dev1/port1/line5
PFI 14 | Dev1/port1/line6
PFI 15 | Dev1/port1/line7

Physical channel Dev1/port0 refers to all four or eight lines, Dev1/port1/line0:3 or Dev1/port1/line0:7, at once. Physical channel Dev1/port1 refers to all four or eight lines, Dev1/port1/line0:3 or Dev1/port1/line0:7, at once.

The NI 6212 and NI 6216 have 16 lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line15. These lines belong to a single port, and the physical channel Dev1/port0 refers to all 16 lines at once. Port 0 can perform static digital I/O operations only.

The NI 6212 and NI 6216 have two more ports, port 1 and port 2. Port 1 has eight digital I/O lines, Dev1/port1/line0 through Dev1/port1/line7. Port 2 has eight digital I/O lines, Dev1/port2/line0 through Dev1/port2/line7. Port 1 and port 2 can be used as static digital I/O lines or PFI lines, PFI 0..15. When any of PFI lines 0..15 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port1/line0
PFI 1 | Dev1/port1/line1
PFI 2 | Dev1/port1/line2
PFI 3 | Dev1/port1/line3
PFI 4 | Dev1/port1/line4
PFI 5 | Dev1/port1/line5
PFI 6 | Dev1/port1/line6
PFI 7 | Dev1/port1/line7
PFI 8 | Dev1/port2/line0
PFI 9 | Dev1/port2/line1
PFI 10 | Dev1/port2/line2
PFI 11 | Dev1/port2/line3
PFI 12 | Dev1/port2/line4
PFI 13 | Dev1/port2/line5
PFI 14 | Dev1/port2/line6
PFI 15 | Dev1/port2/line7

Physical channel Dev1/port1 refers to all eight lines, Dev1/port1/line0:7, at once. Physical channel Dev1/port2refers to all eight lines, Dev1/port2/line0:7, at once.

Counter Input and Output

All M Series devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

16-PFI Line Devices (NI 6218)

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 9 | PFI 4
Dev1/ctr1 | PFI 3 | PFI 2 | PFI 10 | PFI 5

16-PFI Line Devices (NI 6212/6216)

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | PFI 10 | PFI 12
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 11 | PFI 13

8-PFI Line Devices (Such as the NI 6210/6211/6215)

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 0 | PFI 4
Dev1/ctr1 | PFI 3 | PFI 2 | PFI 3 | PFI 5


NI 6221 (37-Pin) Device Physical Channels

In physical channel names, Dev1 is the default device name for NI 6221 (37-pin) devices. You can change these names in MAX.

Parent topic: M Series

Analog Input

A 16-channel NI 6221 (37-pin) device has physical channels ranging from Dev1/ai0 to Dev1/ai15. You can configure only channels 0 through 7 in differential mode. When you configure a channel in differential mode, the channel is the positive input and channel plus eight is the negative input. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input.

Analog Output

NI 6221 (37-pin) devices have two analog outputs corresponding to two analog output physical channels named Dev1/ao0 and Dev1/ao1.

Digital Input and Output

NI 6221 (37-pin) devices have two ports, port 0 and port 1. Port 0 has two digital I/O lines, Dev1/port0/line0 and Dev1/port0/line1. Port 1 has eight digital I/O lines, Dev1/port1/line0 through Dev1/port1/line7. Port 1 can be used as static digital I/O lines or input PFI lines, PFI 0..7. When any of PFI lines 0..7 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port1/line0
PFI 1 | Dev1/port1/line1
PFI 2 | Dev1/port1/line2
PFI 3 | Dev1/port1/line3
PFI 4 | Dev1/port1/line4
PFI 5 | Dev1/port1/line5
PFI 6 | Dev1/port1/line6
PFI 7 | Dev1/port1/line7

Physical channel Dev1/port0 refers to both lines, Dev1/port0/line0:1, at once. Physical channel Dev1/port1 refers to all eight lines, Dev1/port1/line0:7, at once.

Counter Input and Output

NI 6221 (37-pin) devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 2 | PFI 6
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 5 | PFI 7

In addition, the NI 6221 (37-pin) has one frequency generator. The output terminal of the frequency generator is FREQOUT. The default for FREQOUT is PFI 5. When using FREQOUT, you can continue to use both ctr0 and ctr1 to perform other operations.


NI 623x Physical Channels

In physical channel names, Dev1 is the default device name for NI 623x devices. You can change these names in MAX.

Parent topic: M Series
Related reference
37-Pin DSUB Signal Connections for Counters

Analog Input

Refer to the following table for the physical channel naming conventions for each 623x device.

Device | Differential |  | RSE
 | + | - | + | -
NI 6230 | Dev1/ai n | Dev1/ai (n+4) | Dev1/ai0..Dev1/ai n, where n=0..3 | AI Gnd
NI 6232 | Dev1/ai n | Dev1/ai (n+8) | Dev1/ai0..Dev1/ai n, where n=0..7 | AI Gnd
NI 6233 | Dev1/ai n | Dev1/ai (n+8) | Dev1/ai0..Dev1/ai n, where n=0..7 | AI Gnd
NI 6236 | Dev1/ai n+ | Dev1/ai n- | Dev1/ai0..Dev1/ai n, where n=0..3 | AI Gnd
NI 6238 | Dev1/ai n+ | Dev1/ai n- | Dev1/ai0..Dev1/ai n, where n=0..7 | AI Gnd
NI 6239 | Dev1/ai n+ | Dev1/ai n- | Dev1/ai0..Dev1/ai n, where n=0..7 | AI Gnd

Analog Output

NI 623x devices have m analog outputs corresponding to m analog output physical channels ranging from Dev1/ao0 to Dev1/ao(m-1). Refer to the hardware documentation for the number of analog outputs for your device.

Digital Input and Output

NI 623x devices have two ports, port 0 and port 1. Port 0 has six digital input lines, Dev1/port0/line0 through Dev1/port0/line5. Port 1 has four digital output lines, Dev1/port1/line0 through Dev1/port1/line3. You can use port 0 as static digital input lines or input PFI lines, PFI 0..5. You can use port 1 as static digital output lines or output PFI lines, PFI 6..9. When any of PFI lines 0..9 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name | Direction
PFI 0 | Dev1/port0/line0 | Input
PFI 1 | Dev1/port0/line1 | Input
PFI 2 | Dev1/port0/line2 | Input
PFI 3 | Dev1/port0/line3 | Input
PFI 4 | Dev1/port0/line4 | Input
PFI 5 | Dev1/port0/line5 | Input
PFI 6 | Dev1/port1/line0 | Output
PFI 7 | Dev1/port1/line1 | Output
PFI 8 | Dev1/port1/line2 | Output
PFI 9 | Dev1/port1/line3 | Output

Physical channel Dev1/port0 refers to all six input lines, Dev1/port0/line0:5, at once. Physical channel Dev1/port1 refers to all four output lines, Dev1/port1/line0:3, at once.

Tristating Digital Output Channels (NI 6230/6236)

NI 6230/6236 devices support tristating for port 1, the four digital output lines. The power-on state default is to tristate port 1. Tristating is supported only for the entire port at a time, not on a per-line basis. For instance, port 1 remains tristated as long as no lines on port 1 are toggled to generate a value. After a line on port 1 is toggled, all lines on the port are driven to logic high or logic low depending on what you choose. The default is logic low.

Counter Input and Output

NI 623x devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 2 | PFI 6
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 5 | PFI 7

In addition, NI 623x devices have one frequency generator. The output terminal of the frequency generator is FREQOUT. The default for FREQOUT is PFI 8. When using FREQOUT, you can continue to use both ctr0 and ctr1 to perform other operations.

NI 623x devices use the same default terminals for common counter applications as other 37-Pin DSUB devices.


myDAQ Physical Channels

In physical channel names, myDAQ1 is the default device name for myDAQ. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
myDAQ Signal Connections for Counters

Analog Input

myDAQ has two analog input channels, myDAQ1/ai0 and myDAQ1/ai1. These channels support only the differential terminal configuration. You can configure the first channel, myDAQ1/ai0, as the positive channel of a differential pair. Use only the physical channel name of the positive channel (not both) when creating a differential channel.

myDAQ also has a DMM physical channel, myDAQ1/dmm, available from the device. On myDAQ, the DMM physical channels cannot be used in the same task with other channels. There are also two audio input channels, myDAQ1/audioInputLeft and myDAQ1/audioInputRight. These channels support only the referenced signal-ended terminal configuration. Analog input tasks do not work simultaneously with audio input.

Analog Output

myDAQ has two analog outputs with analog output physical channels named myDAQ1/ao0 and myDAQ1/ao1. myDAQ also has two audio output channels, myDAQ1/audioOutputLeft and myDAQ1/audioOutputRight. Analog output tasks do not work simultaneously with audio out.

Digital Input and Output

myDAQ has eight lines of digital input and output named myDAQ1/port0/line0 through myDAQ1/port0/line7. These lines belong to a single port, and the physical channel myDAQ1/port0 refers to all 8 lines at once.

Counter Input and Output

myDAQ has one counter/timer referred to by the physical channel name myDAQ1/ctr0. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
myDAQ1/ctr0 | PFI 0 (DIO 0) | PFI 1 (DIO 1) | PFI 2 (DIO 2) | PFI 3 (DIO 3)


NI 6010 Physical Channels

In physical channel names, Dev1 is the default device name for NI 6010 devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
37-Pin DSUB Signal Connections for Counters

Analog Input

A 16-channel NI 6010 device has physical channels ranging from Dev1/ai0 to Dev1/ai15. You can configure only channels 0 through 7 in differential mode. When you configure a channel in differential mode, the channel is the positive input and channel plus eight is the negative input. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input.

Use only the physical channel name of the positive channel (not both) when creating a differential channel.

Analog Output

NI 6010 devices have two analog outputs corresponding to two analog output physical channels named Dev1/ao0 and Dev1/ao1.

Digital Input and Output

NI 6010 devices have two ports, port 0 and port 1. Port 0 has six digital input lines, Dev1/port0/line0 through Dev1/port0/line5. Port 1 has four digital output lines, Dev1/port1/line0 through Dev1/port1/line3. You can use port 0 as static digital input lines or input PFI lines, PFI 0..5. You can use port 1 as static digital output lines or output PFI lines, PFI 6..9. When any of PFI lines 0..9 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port0/line0
PFI 1 | Dev1/port0/line1
PFI 2 | Dev1/port0/line2
PFI 3 | Dev1/port0/line3
PFI 4 | Dev1/port0/line4
PFI 5 | Dev1/port0/line5
PFI 6 | Dev1/port1/line0
PFI 7 | Dev1/port1/line1
PFI 8 | Dev1/port1/line2
PFI 9 | Dev1/port1/line3

Physical channel Dev1/port0 refers to all six input lines, Dev1/port0/line0:5, at once. Physical channel Dev1/port1 refers to all four output lines, Dev1/port1/line0:3, at once.

Counter Input and Output

NI 6010 devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 2 | PFI 6
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 5 | PFI 7


NI 6154 Physical Channels

In physical channel names, Dev1 is the default device name for NI 6154 devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
37-Pin DSUB Signal Connections for Counters

Analog Input

A 4-channel NI 6154 device has physical channels ranging from Dev1/ai0 to Dev1/ai3.

Analog Output

NI 6154 devices have four analog outputs corresponding to four analog output physical channels ranging from Dev1/ao0 to Dev1/ao3.

Digital Input and Output

NI 6154 devices have two ports, port 0 and port 1. Port 0 has six digital input lines, Dev1/port0/line0 through Dev1/port0/line5. Port 1 has four digital output lines, Dev1/port1/line0 through Dev1/port1/line3. You can use port 0 as static digital input lines or input PFI lines, PFI 0..5. You can use port 1 as static digital output lines or output PFI lines, PFI 6..9. When any of PFI lines 0..9 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name | Direction
PFI 0 | Dev1/port0/line0 | Input
PFI 1 | Dev1/port0/line1 | Input
PFI 2 | Dev1/port0/line2 | Input
PFI 3 | Dev1/port0/line3 | Input
PFI 4 | Dev1/port0/line4 | Input
PFI 5 | Dev1/port0/line5 | Input
PFI 6 | Dev1/port1/line0 | Output
PFI 7 | Dev1/port1/line1 | Output
PFI 8 | Dev1/port1/line2 | Output
PFI 9 | Dev1/port1/line3 | Output

Physical channel Dev1/port0 refers to all six input lines, Dev1/port0/line0:5, at once. Physical channel Dev1/port1 refers to all four output lines, Dev1/port1/line0:3, at once.

Counter Input and Output

NI 6154 devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 0 | PFI 1 | PFI 2 | PFI 6
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 5 | PFI 7

In addition, the NI 6154 has one frequency generator. The output terminal of the frequency generator is FREQOUT. The default for FREQOUT is PFI 8. When using FREQOUT, you can continue to use both ctr0 and ctr1 to perform other operations.

The NI 6154 uses the same default terminals for common counter applications as other 37-Pin DSUB devices.


NI 6533/6534 Device Physical Channels

Parent topic: Physical Channels

Digital Input and Output

All NI 6533/6534 devices have 32 individually configurable lines of digital input and output that are grouped into four 8-bit ports.

Port | NI-DAQmx Physical Channel Name (Lines) | NI-DAQmx Physical Channel Name (Ports)1
Port 0 | Dev1/port0/line0 — Dev1/port0/line7 | Dev1/port0
Port 1 | Dev1/port1/line0 — Dev1/port1/line7 | Dev1/port1
Port 2 | Dev1/port2/line0 — Dev1/port2/line7 | Dev1/port2
Port 3 | Dev1/port3/line0 — Dev1/port3/line7 | Dev1/port3

For Ports 0 through 3, you can configure a port width of eight, 16, or 32 bits. To configure a 32-bit port, use the physical channel name Dev1/port0_32. To configure a 16-bit port, use channel names that refer to all the lines in multiple consecutive ports: Dev1/port P_N, where P is the port number of the lowest numbered port, and N is the total number of lines. For instance, combining Port 2 and 3 into a 16-bit port, you would specify Dev1/port2_16 as the physical channel.

NI 6533/6534 devices also have eight fixed-direction lines, grouped into two ports, that use PFI lines. Port 4 is used for input operations; Port 5 is for output.

Port 4 and port 5 can be used as static digital I/O lines or PFI lines. When any of these PFI lines is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI0 | Dev1/port4/line0
PFI1 | Dev1/port4/line1
PFI2 | Dev1/port4/line2
PFI3 | Dev1/port4/line3
PFI4 | Dev1/port5/line2
PFI5 | Dev1/port5/line3
PFI6 | Dev1/port5/line0
PFI7 | Dev1/port5/line1
1 This physical channel name refers to all eight lines in a port at once.


NI 6535/6536/6537 Physical Channels

The 32 individually configurable lines of digital input and output on the NI 6535/6536/6537 are grouped into four 8-bit ports, as shown in the following table. You can choose to configure an entire port for a particular task or only a particular physical channel.

The following table shows the channel names you can use to configure your task in NI-DAQmx. Dev1 in physical channel names is the default device name for NI 6535/6536/6537 devices. You can change the device name in MAX.

Port | NI-DAQmx Physical Channel Name (Lines) | NI-DAQmx Physical Channel Name (Ports)1
Port 0 | Dev1/port0/line0 — Dev1/port0/line7 | Dev1/port0
Port 1 | Dev1/port1/line0 — Dev1/port1/line7 | Dev1/port1
Port 2 | Dev1/port2/line0 — Dev1/port2/line7 | Dev1/port2
Port 3 | Dev1/port3/line0 — Dev1/port3/line7 | Dev1/port3
Port 42 | Dev1/port4/line0 — Dev1/port4/line5 | Dev1/port4

For Ports 0 through 3, you can configure a port width of 8, 16, or 32 bits. To configure a 32-bit port, use the physical channel name Dev1/port0_32. To configure a 16-bit port, use channel names that refer to all the lines in multiple consecutive ports: Dev1/port P_N, where P is 0 or 2 (whichever port number is lower) and N is the total number of lines. For example, to combine Port 2 and 3 into a 16-bit port, specify Dev1/port2_16 as the physical channel.

Using NI-DAQmx, you can configure each physical channel individually by inverting or tristating the physical channel.

Parent topic: Physical Channels

PFI Lines

The NI 6535/6536/6537 has six PFI lines. These bidirectional digital lines allow you to route synchronization and timing signals to and from the I/O connector. The following table lists the PFI lines and their timing function.

PFI 0 | General-purpose PFI line
PFI 1 | General-purpose PFI line
PFI 2 | General-purpose PFI line
PFI 3 | General-purpose PFI line
PFI 4 | General-purpose PFI or the generation Sample clock terminal
PFI 5 | General-purpose PFI or the acquisition Sample clock terminal

You can use control lines as extra data lines while using the On Demand sample timing type.

Related concepts
Sample Timing Types
1 This physical channel name refers to all eight lines in a port at once.
2 Port 4 is composed of the six PFI lines.


NI ELVIS II Family Physical Channels

In physical channel names, Dev1 is the default device name for the NI ELVIS II Family device. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
NI ELVIS II Family Signal Connections for Counters

Analog Input

NI ELVIS II Family devices have 16 analog input channels, ranging from Dev1/ai0 to Dev1/ai15. You can configure the first eight channels as the positive channel of a differential pair. If N is this channel, channel N + 8 is the negative input of the pair. For instance, if you configure channel 1 in differential mode, the positive input is channel 1, and channel 9 is the negative input.

Use only the physical channel name of the positive channel (not both) when creating a differential channel.

NI ELVIS II Family devices have two oscilloscope physical channels, Dev1/scopeCh0 and Dev1/scopeCh1, available from the NI ELVIS II Family benchtop workstation. The NI ELVIS II Family benchtop workstation also has a DMM physical channel, Dev1/dmm. On the NI ELVIS II Family devices, the DMM and oscilloscope physical channels cannot be used in the same task with other channels. However, scopeCh0 and scopeCh1 can be used together.

Analog Output

NI ELVIS II Family devices have two analog outputs with analog output physical channels named Dev1/ao0 and Dev1/ao1. NI ELVIS II Family devices also have two function generator channels, Dev1/fgen and Dev1/fgenBNC, and two variable power supply channels, Dev1/vpsPos (the positive variable power supply) and Dev1/vpsNeg (the negative variable power supply). The function generator channels, Dev1/fgen and Dev1/fgenBNC, use the FGEN Create Channel function/VI. These function generator terminals also share the same resource.

Digital Input and Output

NI ELVIS II Family devices have 24 lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line23. These lines belong to a single port, and the physical channel Dev1/port0 refers to all 24 lines at once. Port 0 can perform static digital operations.

NI ELVIS II Family devices have two more ports, port 1 and port 2. Port 1 has eight digital I/O lines, Dev1/port1/line0 through Dev1/port1/line7. Port 2 has seven digital I/O lines, Dev1/port2/line0 through Dev1/port2/line6. Port 1 and port 2 can be used as static digital I/O lines or PFI lines, PFI 0..14. When any of PFI lines 0..14 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port1/line0
PFI 1 | Dev1/port1/line1
PFI 2 | Dev1/port1/line2
PFI 3 | Dev1/port1/line3
PFI 4 | Dev1/port1/line4
PFI 5 | Dev1/port1/line5
PFI 6 | Dev1/port1/line6
PFI 7 | Dev1/port1/line7
PFI 8 | Dev1/port2/line0
PFI 9 | Dev1/port2/line1
PFI 10 | Dev1/port2/line2
PFI 11 | Dev1/port2/line3
PFI 12 | Dev1/port2/line4
PFI 13 | Dev1/port2/line5
PFI 14 | Dev1/port2/line6

Physical channel Dev1/port1 refers to all eight lines, Dev1/port1/line0:7, at once. Physical channel Dev1/port2 refers to all seven lines, Dev1/port2/line0:6, at once.

Counter Input and Output

NI ELVIS II Family devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are four primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | PFI 10 | PFI 12
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 11 | PFI 13

Note Note PFI 15 refers to the same terminal as dev1/fgenBNC and both cannot be used at the same time. PFI 15 is used as an external clock, as a trigger, and for counter input operations.


S Series Physical Channels

Dev1 in physical channel names is the default device name for S Series devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
AO Series, E Series, and S Series Signal Connections for Counters

Analog Input

An S Series device has between two and eight analog input physical channels named Dev1/ai0 to Dev1/ai7.

Analog Output

An S Series device that supports analog output has two analog output physical channels named Dev1/ao0 and Dev1/ao1.

Digital Input and Output

All S Series devices have eight lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line7. These lines belong to a single port, and the physical channel Dev1/port0 refers to all eight lines at once.

Counter Input and Output

All S Series devices have two counter/timers referred to by the physical channel names Dev1/ctr0 and Dev1/ctr1. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are three primary terminals associated with each counter. These are the terminals used as the SOURCE, GATE and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signal provides the SOURCE or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | CTR 0 OUT
Dev/ctr1 | PFI 3 | PFI 4 | CTR 1 OUT


SCXI and SCC Physical Channels

SC1Mod1 is the default device name for an SCXI module, where SC1 is the default chassis ID, and Mod1 refers to the slot number. These names can be changed in MAX.

Parent topic: Physical Channels

Analog Input

An SCXI module usually has eight or 32 analog input channels; refer to your device documentation to be sure. These physical channel names are of the form SC1Mod<slot#>/ai0 to SC1Mod<slot#>/ai N, where <slot#> is the chassis slot number of the module, and N equals the number of analog input channels on the module minus one. For example, SCI1Mod1/ai31 is the highest numbered physical channel for a module with 32 analog input channels.

An SCC module has either one or two physical channels named SCC1Mod<J connector#>aiN, where <J connector#> is the number of the J connector where the SCC module resides, and N is the channel number. SCC1 is the SCC connector block ID (for example, SCC1Mod1/ai0).

NI PXI-4224 Only—You cannot scan channel ai7 and the CJC channel simultaneously in a task, since the CJC channel is multiplexed to channel 7. However, when you make a thermocouple measurement on ai0:7 with internal CJC, NI-DAQmx automatically reads the CJC channel at the beginning of the measurement and then scans the rest of the channels correctly.

Analog Output

An SCXI module has some number of output channels for voltage or current. These physical channel names are of the form SC1Mod<slot#>/ao0 to SC1Mod<slot#>/ao N, where <slot#> is the chassis slot number of the module, and N equals the number of analog output channels on the module minus one. For example, SC1Mod1/ao5 is the highest numbered physical channel on a module with six channels.

Digital Input and Output

An SCXI digital module has eight, 16, or 32 lines named SC1Mod<slot#>/port0/line0 through SC1Mod<slot#>/port0/line N, where <slot#> is the chassis slot number of the module, and N is the number of digital lines minus one. For example, SC1Mod1/port0/line31 is the highest numbered line for a module with 32 lines. These lines belong to a single port and the physical channel named SC1Mod<slot#>/port0 refers to all the lines at once.

An SCC module has either one digital input line or one digital output line with names of the form SCC1Mod<J connector#>di N or SCC1Mod<J connector#>do N, where <J connector#> is the number of the J connector where the SCC module resides, and N is the channel number. SCC1 is the SCC connector block ID (for example, SCC1Mod1/di0).


SC Express Physical Channels

In physical channel names, PXI1Slot1 is the default device name for SC Express devices, where PXI1 is the chassis number, and Slot1 refers to the slot number. You can change these names in MAX.

Parent topic: Physical Channels

Analog Input

SC Express Devices have from four to 32 analog input channels. A 4-channel device has physical channels ranging from PXISlot1/ai0 to PXISlot1/ai3, an 8-channel device has physical channels ranging from PXISlot1/ai0 to PXISlot1/ai7, and a 32-channel device has channels ranging from PXISlot1/ai0 to PXISlot1/ai31.

You can use channels from multiple analog input SC Express devices in the same NI-DAQmx task.

Analog Output

NI 4322 devices have eight analog output channels ranging from PXI1Slot1/ao0 to PXISlot1/ao7. You can use channels from multiple analog output SC Express devices in the same NI-DAQmx task.

Strain and Wheatstone Bridge Measurements

The NI 4330 and 4331 devices support only the AI Strain Gage, AI Force Bridge, AI Pressure Bridge, AI Torque Bridge, AI Bridge (V/V), and AI Custom Voltage With Excitation channel types. The NI 4339 supports AI Voltage in addition to the previously mentioned measurement types.

When using NI 4330 and 4331 devices with an AI Custom Voltage With Excitation channel, you must set the AI.Excit.UseForScaling attribute/property to true. This attribute/property causes the channel to return ratiometric data: Vin/Vex. These devices perform this division in hardware. The NI 4339 does not require the AI.Excit.UseForScaling attribute/property. Disabling this property allows for the NI 4339 to perform voltage measurements while providing voltage excitation.

NI 4330 and 4331 devices return a voltage ratio rather than a voltage. Therefore, use the AI.Bridge.InitialRatio attribute/property to specify the initial voltage ratio, or set the AI.Bridge.InitialVoltage attribute/property to the ratio Vin/Vex returned by the device, multiplied by Vex.


SensorDAQ Physical Channels

SensorDAQ has analog input, analog output, digital I/O, and counter channels. It also has three analog sensor channels (labeled Ch. 1, Ch. 2, and Ch. 3 on the device) and one digital sensor channel (labeled DIG on the device) for use with Vernier sensors. Please contact Vernier for additional information on the analog and digital sensor channels.

Parent topic: Physical Channels

Analog Input

SensorDAQ has two AI physical channels, Dev1/ai0 and Dev1/ai1. When you configure a channel in differential mode, Dev1/ai0 is the positive input and Dev1/ai1 is the negative input.

Analog Output

SensorDAQ has two AO physical channels, Dev1/ao0 and Dev1/ao1.

Digital Input/Output

SensorDAQ has four digital I/O physical channels.

Counter Input and Output

There is one counter channel referred to by the physical channel name Dev1/ctr0. pfi0 is the terminal used for this physical channel.


TIO Physical Channels

Parent topic: Physical Channels

Counter Input and Output

TIO devices have up to eight counter/timers referred to by the physical channel names Dev1/ctr0 to Dev1/ctr7. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device.

There are four primary terminals associated with each TIO counter. These are the terminals used as the SOURCE, GATE, AUX, and OUT functions. NI-DAQmx has default values for these terminals. For counter input tasks, if you know whether your signals provide the SOURCE, GATE, or AUX functions and wire your signal to the default input, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 39 | PFI 38 | PFI 37 | PFI 36
Dev1/ctr1 | PFI 35 | PFI 34 | PFI 33 | PFI 32
Dev1/ctr2 | PFI 31 | PFI 30 | PFI 29 | PFI 28
Dev1/ctr3 | PFI 27 | PFI 26 | PFI 25 | PFI 24
Dev1/ctr4 | PFI 23 | PFI 22 | PFI 21 | PFI 20
Dev1/ctr5 | PFI 19 | PFI 18 | PFI 17 | PFI 16
Dev1/ctr6 | PFI 15 | PFI 14 | PFI 13 | PFI 12
Dev1/ctr7 | PFI 11 | PFI 10 | PFI 9 | PFI 8
Note Note The NI 6601 has only four counters (ctr0–ctr3). The entries in the previous table for cntr4, cntr5, cntr6, and cntr7 do not apply for that device.

Digital Input and Output

NI 661x devices have two ports, port 0 and port 1. Port 0 has 32 lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line31. Port 1 has 8 lines of digital input and output named Dev1/port1/line0 through Dev1/port1/line7. The physical channel Dev1/port0 refers to all 32 lines at once, and the physical channel Dev1/port1 refers to all 8 lines at once. Port 0 can perform hardware-timed and static digital operations, while port 1 can perform only static digital operations.

Port 0 and port 1 can be used as static PFI lines, PFI 0..39. When any of PFI lines 0..39 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port0/line0
PFI 1 | Dev1/port0/line1
PFI 2 | Dev1/port0/line2
PFI 3 | Dev1/port0/line3
PFI 4 | Dev1/port0/line4
PFI 5 | Dev1/port0/line5
PFI 6 | Dev1/port0/line6
PFI 7 | Dev1/port0/line7
PFI 8 | Dev1/port0/line8
PFI 9 | Dev1/port0/line9
PFI 10 | Dev1/port0/line10
PFI 11 | Dev1/port0/line11
PFI 12 | Dev1/port0/line12
PFI 13 | Dev1/port0/line13
PFI 14 | Dev1/port0/line14
PFI 15 | Dev1/port0/line15
PFI 16 | Dev1/port0/line16
PFI 17 | Dev1/port0/line17
PFI 18 | Dev1/port0/line18
PFI 19 | Dev1/port0/line19
PFI 20 | Dev1/port0/line20
PFI 21 | Dev1/port0/line21
PFI 22 | Dev1/port0/line22
PFI 23 | Dev1/port0/line23
PFI 24 | Dev1/port0/line24
PFI 25 | Dev1/port0/line25
PFI 26 | Dev1/port0/line26
PFI 27 | Dev1/port0/line27
PFI 28 | Dev1/port0/line28
PFI 29 | Dev1/port0/line29
PFI 30 | Dev1/port0/line30
PFI 31 | Dev1/port0/line31
PFI 32 | Dev1/port1/line1
PFI 33 | Dev1/port1/line2
PFI 34 | Dev1/port1/line3
PFI 35 | Dev1/port1/line4
PFI 36 | Dev1/port1/line5
PFI 37 | Dev1/port1/line6
PFI 38 | Dev1/port1/line7
PFI 39 | Dev1/port1/line8


USB and Network DAQ Physical Channels

Dev1 in physical channel names is the default device name for USB Series DAQ devices. You can change these names in MAX.

Parent topic: Physical Channels

Analog Input

The following table lists the number and naming of analog input physical channels for USB and Network DAQ devices.

Device | Number of Channels | Naming
NI ENET-9211, NI USB-9211A, NI WLS-9211, NI ENET-9215, NI USB-9215A, NI WLS-9215, NI ENET-9219, NI USB-9219, NI WLS-9219, NI USB-9229, NI USB-9233, NI ENET-9234, NI USB-9234, NI WLS-9234, NI ENET-9237, NI USB-9237, NI WLS-9237, NI USB-9239 | 4 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai3
NI USB-9201, NI USB-9221 | 8 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai7
NI ENET-9213, NI USB-9213, NI WLS-9213 | 16 | cDAQ1Mod1/ai0 to cDAQ1Mod1/ai15

Strain and Wheatstone Bridge Measurements

The NI 9235, NI 9236, and NI 9237 support only the AI Strain Gage, AI Force Bridge, AI Pressure Bridge, AI Torque Bridge, AI Bridge (V/V), and AI Custom Voltage With Excitation channel types.

When using the NI ENET-9219, NI USB-9219, NI WLS-9219, NI ENET-9237, NI USB-9237, or NI WLS-9237 with an AI Custom Voltage With Excitation channel, you must set the AI.Excit.UseForScaling attribute/property to true. This attribute/property causes the channel to return ratiometric data: Vin/Vex. The NI ENET-9219, NI USB-9219, NI WLS-9219, NI ENET-9237, NI USB-9237, and NI WLS-9237 modules perform this division in hardware.

For the NI ENET-9219, NI USB-9219, and NI WLS-9219, NI-DAQmx requires the AI.Excit.Val attribute/property to be set to 2.5 V for AI Strain Gage and AI Custom Voltage With Excitation channel types and to 500 µA for resistance and RTD measurements. The actual excitation voltage or current output by the NI ENET-9219, NI USB-9219, and NI WLS-9219 varies with the sensor resistance or the load being measured.

NI ENET-9219, NI USB-9219, NI WLS-9219, NI ENET-9237, NI USB-9237, and NI WLS-9237 devices return a voltage ratio rather than a voltage. Therefore, use the AI.Bridge.InitialRatio attribute/property to specify the initial voltage ratio, or set the AI.Bridge.InitialVoltage attribute/property to the ratio Vin/Vex returned by the device, multiplied by Vex.

The NI ENET-9219, NI USB-9219, and NI WLS-9219 do not have quarter bridge completion circuitry, which affects AI Strain Gage Quarter Bridge I channels and AI Custom Voltage With Excitation Quarter Bridge channels (but not AI Strain Gage Quarter Bridge II channels). With these channels, the NI ENET-9219, NI USB-9219, and NI WLS-9219 perform a 2-wire resistance measurement on the active gage element, then NI-DAQmx uses software scaling to convert the resistance measurement into a bridge ratio. For these channels, the polynomial coefficients specified by the AI.DevScalingCoeff attribute/property convert unscaled data into Ohms, not into V/V. Likewise, the AI.Rng.High/AI.Rng.Low attributes/properties should be specified in units of Ohms, not V/V.

When the NI ENET-9219, NI USB-9219, and NI WLS-9219 is in quarter bridge mode, you need to use the AI.Bridge.NomResistance attribute/property to control whether the channel uses the 120 Ω range or the 350 Ω range.

Analog Output

The following table lists the number and naming of analog output physical channels for USB and Network DAQ devices.

Device | Number of Channels | Naming
NI USB-9263, NI USB-9265 | 4 | cDAQ1Mod1/ao0 to cDAQ1Mod1/ao3
NI USB-9264 | 16 | cDAQ1Mod1/ao0 to cDAQ1Mod1/ao15

When using the NI USB-9263, NI-USB 9264, or NI USB-9265, you can run only one type of timing at a time. You can have one software-timed task per channel or one hardware-timed task running on a device at one time, but you cannot have a combination of timing on that device. For instance, you can run up to four software-timed tasks on an the NI USB-9263 concurrently, but running one hardware-timed task with one software-timed task generates an error. Additionally, the NI USB-9263, NI-USB 9264, and NI USB-9265 can run only one hardware-timed analog output task per device at a given time.


X Series Physical Channels

In physical channel names, Dev1 is the default device name for X Series devices. You can change these names in MAX.

Parent topic: Physical Channels
Related reference
X Series Signal Connections for Counters

Analog Input

Depending on your X Series device, you can have from eight to 208 analog input channels. An 8-channel X Series device has physical channels ranging from Dev1/ai0 to Dev1/ai7, a 208-channel device from Dev1/ai0 to Dev1/ai207.

Use only the physical channel name of the positive channel (not both) when creating a differential channel.

Analog Output

An X Series device that supports two analog outputs has analog output physical channels named Dev1/ao0 and Dev1/ao1.

An X Series device that supports four analog outputs has analog output physical channels named Dev1/ao0, Dev1/ao1, Dev1/ao2, and Dev1/ao3.

Digital Input and Output

All X Series devices have eight or 32 lines of digital input and output named Dev1/port0/line0 through Dev1/port0/line7 or Dev1/port0/line0 through Dev1/port0/line31. These lines belong to a single port, and the physical channel Dev1/port0 refers to all eight or 32 lines at once. Port 0 can perform both hardware-timed and static digital operations.

X Series devices have two more ports, port 1 and port 2. Port 1 has eight digital I/O lines, Dev1/port1/line0 through Dev1/port1/line7. Port 2 has eight digital I/O lines, Dev1/port2/line0 through Dev1/port2/line7. Port 1 and port 2 can be used as static digital I/O lines or PFI lines, PFI 0..15. When any of PFI lines 0..15 is used as a digital I/O signal, it uses the physical channel name shown in the following table.

PFI Signal | Physical Channel Name
PFI 0 | Dev1/port1/line0
PFI 1 | Dev1/port1/line1
PFI 2 | Dev1/port1/line2
PFI 3 | Dev1/port1/line3
PFI 4 | Dev1/port1/line4
PFI 5 | Dev1/port1/line5
PFI 6 | Dev1/port1/line6
PFI 7 | Dev1/port1/line7
PFI 8 | Dev1/port2/line0
PFI 9 | Dev1/port2/line1
PFI 10 | Dev1/port2/line2
PFI 11 | Dev1/port2/line3
PFI 12 | Dev1/port2/line4
PFI 13 | Dev1/port2/line5
PFI 14 | Dev1/port2/line6
PFI 15 | Dev1/port2/line7

Physical channel Dev1/port1 refers to all eight lines, Dev1/port1/line0:7, at once. Physical channel Dev1/port2 refers to all eight lines, Dev1/port2/line0:7, at once.

Counter Input and Output

All X Series devices have four counter/timers referred to by the physical channel names Dev1/ctr0, Dev1/ctr1, Dev1/ctr2, and Dev1/ctr3. Unlike the other I/O types, these physical channel names do not refer to terminals on the I/O connector but instead to circuits within the device. There are five primary signals associated with each counter: SOURCE, GATE, AUX, OUT, and sample clock. NI-DAQmx has default terminals for these signals, except for the sample clock. For counter input tasks, if you know whether your signal provides the SOURCE, AUX, or GATE function and wire your signal to the default, you do not have to set the Input Terminal attribute/property.

Counter | SOURCE Default | GATE Default | AUX Default | OUT Default
Dev1/ctr0 | PFI 8 | PFI 9 | PFI 10 | PFI 12
Dev1/ctr1 | PFI 3 | PFI 4 | PFI 11 | PFI 13
Dev1/ctr2 | PFI 5 | PFI 6 | PFI 7 | PFI 15
Dev1/ctr3 | PFI 0 | PFI 1 | PFI 2 | PFI 14


Internal Channels

On some devices, you can either acquire a signal present on the I/O connector or acquire a signal that is being generated from the internal multiplexer (an internal channel). The internal channels available on the multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels, you must use the internal channel as the device's physical channel (for example, Dev1/_aignd_vs_aignd) when creating the virtual channel.

Parent topic: Physical Channels
Related concepts
Internal Channels for C Series Devices
Internal Channels for DSA Devices
Internal Channels for E Series Devices
Internal Channels for M Series and NI 6010 Devices
Internal Channels for NI ELVIS II Family
Internal Channels for NI USB-TC01
Internal Channels for the NI PXI-42xx
Internal Channels for S Series Devices
Internal Channels for SC Express Devices
SCXI Internal Channels
Internal Channels for USB DAQ Devices
Internal Channels for X Series Multiplexed Sampling Devices
Internal Channels for X Series Simultaneous Sampling Devices


Internal Channels for C Series Devices

Parent topic: Internal Channels

Internal Channels for the NI 9210 Device

Internal Channel Name | Description
_aignd_vs_aignd | A referenced single-ended terminal with the positive and negative terminals both connected to the ground reference for analog input.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_cjtemp | A referenced single-ended terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.

Internal Channels for the NI 9211 Device

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_cjtemp | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.

Internal Channels for the NI 9212 Device

Internal Channel Name | Description
_cjtemp0 | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.
_cjtemp1 | This channel is used for cold-junction compensation.

Internal Channels for the NI 9213 Device

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_cjtemp | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.

Internal Channels for the NI 9214 Device

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_cjtemp0 | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.
_cjtemp1 | This channel is used for cold-junction compensation.
_cjtemp2 | This channel is used for cold-junction compensation.

Internal Channels for the NI 9205 and NI 9206 Devices

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_aignd_vs_aisense | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE.
_calSrcHi_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_calSrcHi_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM..
_calSrcMid_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_boardTempSensor_vs_aignd | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input.
_ai0_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai0 and the negative terminal connected to the calibration PWM.
_ai8_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai8 and the negative terminal connected to the calibration PWM.

Internal Channels for the NI 9219 Device

Internal Channel Name | Description
_cjtemp0 | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation for analog input channel 0.
_cjtemp1 | This channel is used for cold-junction compensation for analog input channel 1.
_cjtemp2 | This channel is used for cold-junction compensation for analog input channel 2.
_cjtemp3 | This channel is used for cold-junction compensation for analog input channel 3.

Internal Channels for the NI cDAQ-9172 Chassis

Internal Channel Name | Description
_ctr0 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_ctr1 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_freqout | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Output Terminal attribute/property that is appropriate for the generation being performed.

Internal Channels for the NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9171, 9174, 9178, 9179, 9181, 9184, 9188, 9188XT, and 9191 Chassis

Internal Channel Name | Description
_ctr0 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_ctr1 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_ctr2 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_ctr3 | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Input Terminal or Output Terminal attributes/properties that are appropriate for the measurement/generation being performed.
_freqout | This physical channel name does not refer to a terminal on the I/O connector but instead to a circuit within the device. You must set the Output Terminal attribute/property that is appropriate for the generation being performed.


Internal Channels for DSA Devices

On a DSA device, you can either acquire a signal present on the I/O connector, or you can acquire a signal that is generated from the internal calibration multiplexer. The channels available on this multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels, you must use one of the device's AI physical channels (for instance, Dev1/ai0) when creating the channel to select which ADC to use, then set the appropriate string value on the Input Source channel attribute/property.

The following table lists internal channels for DSA devices.

Internal Channel Name | Supported Devices | Description
_external_channel | All DSA devices | The source of the AI channel is the device input connector, or an accessory connected to the device connector.
_5Vref_vs_aignd | 4461/4462/4464, 447x | The source of the AI channel is the onboard reference signal (for example, +5V).
_pos10Vref_vs_aignd | 4464 | The source of the AI channel is the onboard reference signal (for example, +10V).
_neg10Vref_vs_aignd | 4464 | The source of the AI channel is the onboard reference signal (for example, -10V).
_pos1Vref_vs_aignd | 4464 | The source of the AI channel is the onboard reference signal (for example, +1V).
_pos316mVref_vs_aignd | 4464 | The source of the AI channel is the onboard reference signal (for example, +316mV).
_aignd_vs_pos10V | 4464 | The source of the AI channel is the onboard reference signal (for example, +10V). The negative terminal is connected to the ground reference for analog input.
_aignd_vs_neg10V | 4464 | The source of the AI channel is the onboard reference signal (for example, -10V). The negative terminal is connected to the ground reference for analog input.
_ao0_vs_ao0neg 1 | 4461 only | The source of the AI channel is the onboard analog output channel 0.
_ao1_vs_ao1neg 1 | 4461 only | The source of the AI channel is the onboard analog output channel 1.
_aignd_vs_aignd | 4461/4462/4464, 447x, 449x | The source of the AI channel is the onboard ground signal.
_ref_sqwv_vs_aignd | 449x | The source of the AI channel is the onboard reference square wave signal.
_calref_vs_aignd | 4464 | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.

For all DSA devices, only one internal channel can be read at a time, although the same internal channel can be read on multiple physical channels (with additional restrictions for NI 447x devices). For example, you cannot simultaneously read the internal 5 V reference on one physical channel and the analog ground on another physical channel.

The NI 447x AI physical channels are grouped into pairs, for instance {ai0, ai1}, {ai2, ai3}, and so on. NI 447x devices cannot read an internal channel on more than one physical channel group, and when reading an internal channel, both physical channels in the group are connected to the internal channel source. For example, if the Input Source for channel ai0 is set to 5Vref_vs_aignd and the Input Source for channel ai1 is left at the default value of _external_channel, ai1 still reads the internal channel 5Vref_vs_aignd since ai0 and ai1 are in the same physical channel group.

Parent topic: Internal Channels
1 The AO internal channels are valid only for devices with AO physical channels.


Internal Channels for E Series Devices

The following table is a list of internal physical channels for all E Series devices. Different E Series devices have different subsets of channels. These channels are typically for self-calibration, and you can sample them as you would a physical channel present on the I/O connector.

Internal Channel Name | Description
_aognd_vs_aognd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog output.
_aognd_vs_aignd | A differential terminal with the positive terminal connected to the ground reference for analog output and the negative terminal connected to the ground reference for analog input.
_ao0_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_calref_vs_calref | A differential terminal with the positive terminal connected to the onboard 5 V reference and the negative terminal connected to the onboard 5 V reference.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the onboard 5 V reference and the negative terminal connected to the ground reference for analog input.
_ao0_vs_calref | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the onboard 5 V reference.
_ao1_vs_calref | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the onboard 5 V reference.
_ao1_vs_ao0 | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to physical channel ao0.
_boardTempSensor_vs_aignd | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input.
_aignd_vs_aignd | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected the ground reference for analog input.
_caldac_vs_aignd | A differential terminal with the positive terminal connected to the onboard calibration DAC and the negative terminal connected to the ground reference for analog input.
_caldac_vs_calref | A differential terminal with the positive terminal connected to the onboard calibration DAC and the negative terminal connected to the onboard 5 V reference.
_PXI_SCXIbackplane_vs_aignd | A terminal where a signal being conditioned by a SCXI module is measured across the PXI/SCXI backplane and not the I/O connector. Reading from this channel is valid only on PXI devices inserted in the rightmost PXI slot of a PXI/SCXI combination chassis.
Parent topic: Internal Channels


Internal Channels for M Series and NI 6010 Devices

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_ao0_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_ao2_vs_aognd | (For M Series devices only.) A differential terminal with the positive terminal connected to physical channel ao2 and the negative terminal connected to the ground reference for analog output.
_ao3_vs_aognd | (For M Series devices only.) A differential terminal with the positive terminal connected to physical channel ao3 and the negative terminal connected to the ground reference for analog output.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_aignd_vs_aisense | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE.
_aignd_vs_aisense2 | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE2.
_calSrcHi_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_calSrcHi_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM.
_calSrcMid_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_calSrcLo_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcLo is the divided down version of _calSrcHi.
_ai0_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai0 and the negative terminal connected to the calibration PWM.
_ai8_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai8 and the negative terminal connected to the calibration PWM.
_boardTempSensor_vs_aignd | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input..
_PXI_SCXIbackplane_vs_aignd | A terminal where a signal being conditioned by a SCXI module is measured across the PXI/SCXI backplane and not the I/O connector. Reading from this channel is valid only on PXI devices inserted in the rightmost PXI slot of a PXI/SCXI combination chassis.
Parent topic: Internal Channels


Internal Channels for NI ELVIS II Family

Internal Channel Name | Description
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_ao0_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_aignd_vs_aisense | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE.
_aignd_vs_aisense2 | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE2.
_calSrcHi_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_calSrcHi_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM.
_calSrcMid_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_calSrcLo_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcLo is the divided down version of _calSrcHi.
_ai0_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai0 and the negative terminal connected to the calibration PWM.
_ai8_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai8 and the negative terminal connected to the calibration PWM.
_boardTempSensor_vs_aignd | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input..
_ai16:31 | A differential or RSE terminal used to access internally connected AI terminals.
_vpsPosCurrent | A differential terminal connected to the shunt resistor on the variable power supply.
_vpsNegCurrent | A differential terminal connected to the shunt resistor on the variable power supply.
_vpsPos_vs_gnd | A differential terminal connected to a voltage divider on the variable power supply.
_vpsNeg_vs_gnd | A differential terminal connected to a voltage divider on the variable power supply.
_dutNeg | Reads the voltage equivalent of Current into the DUT- pin.
_base | Reads the voltage at the base pin (base voltage for 3-wire analyzer).
_dutPos | Reads the voltage at the DUT+ pin.
_fgenImpedance | Internally routes the function generator to the impedance analyzer circuit.
_ao0Impedance | Internally routes AO 0 to the impedance analyzer for Three-Wire Current-Voltage Analyzer measurements.
Parent topic: Internal Channels


Internal Channels for the NI PXI-42xx

The following table is a list of internal physical channels for the PXI-42xx devices. The subset of channels present on your device depends on the specific E Series device being used. These channels are typically for self-calibration, and you can sample them as you would a physical channel present on the I/O connector

Internal Channel Name | Description
_cjTemp | A cold-junction compensation channel for measuring the temperature at the I/O connector when making thermocouple measurements.
_aignd_vs_aignd | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected the ground reference for analog input.
_caldac_vs_aignd | A differential terminal with the positive terminal connected to the onboard calibration DAC and the negative terminal connected to the ground reference for analog input.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the onboard 5 V reference and the negative terminal connected to the ground reference for analog input.
_boardTempSensor_vs_aignd | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input.
PXI_SCXIbackplane_vs_aignd | A terminal where a signal being conditioned by a SCXI module is measured across the PXI/SCXI backplane and not the I/O connector. Reading from this channel is valid only on PXI devices inserted in the rightmost PXI slot of a PXI/SCXI combination chassis.
_extcal_vs_aignd | A differential terminal with the positive terminal connected to the external calibration input and the negative terminal connected to the ground reference for analog input.
_pod_calrefPos_vs_aignd | A differential terminal with the positive terminal connected to the internal positive reference voltage and the negative terminal connected to the ground reference for analog input.
_pod_calrefNeg_vs_aignd | A differential terminal with the positive terminal connected to the internal negative reference voltage and the negative terminal connected to the ground reference for analog input.
Parent topic: Internal Channels


Internal Channels for NI USB-TC01

Internal Channel Name | Description
_cjtemp | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.
Parent topic: Internal Channels


Internal Channels for S Series Devices

On an S Series device, you can either acquire a signal present on the I/O connector, or you can acquire a signal that is being generated from the internal calibration multiplexer. The channels available on this multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels, you must use one of the device's AI physical channels ( Dev1/ai0 through Dev1/ai7) when creating the virtual channel. The physical channel specifies the ADC for the internal channel. You can then set the appropriate string value on the Input Source channel attribute/property.

Note Note All S Series devices must have the same Input Source setting on all channels. The NI PCI-6110 and NI PCI-6111 devices cannot acquire from more than one ADC at a time when using an internal channel.
  • NI PCI-6110, NI PCI-6111, NI 6115, NI 6120 Internal Channels
    • _external_channel
    • _aognd_vs_aognd
    • _aognd_vs_aignd
    • _ao0_vs_aognd
    • _ao1_vs_aognd
    • _calref_vs_calref
    • _calref_vs_aignd
    • _ao0_vs_calref
    • _ao1_vs_calref
  • NI PCI-6143 Internal Channels
    • _external_channel
    • _aignd_vs_aignd
    • _calref_vs_aignd
    • _calSrcHi_vs_aignd
    • _calref_vs_calSrcHi
    • _calSrcHi_vs_calSrcHi
    • _aignd_vs_calSrcHi
  • NI PXI-6132/6133 Internal Channels
    • _external_channel
    • _aignd_vs_aignd
    • _calref_vs_aignd
    • _calSrcMid_vs_aignd
    • _calSrcHi_vs_aignd
    • _calref_vs_calSrcHi
    • _calSrcMid_vs_calSrcHi
    • _calSrcHi_vs_calSrcHi
    • _aignd_vs_calSrcHi
  • NI PCI-6154 Internal Channels
    • _external_channel
    • _aignd_vs_aignd
    • _calref_vs_aignd
    • _calSrcHi_vs_aignd
    • _aignd_vs_calSrcHi
    • _calref_vs_calSrcHi
    • _calSrcHi_vs_calSrcHi
    • _aox_vs_aognd

The following table describes all S Series internal channels.

Internal Channel Name | Description
_external_channel | The differential terminal on the I/O connector that is typically used for acquiring data.
_aignd_vs_aignd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog input.
_aognd_vs_aognd | A differential terminal with the positive and negative terminals both connected to the ground reference for analog output.
_aognd_vs_aignd | A differential terminal with the positive terminal connected to the ground reference for analog output and the negative terminal connected to the ground reference for analog input.
_aox_vs_aognd | A differential terminal with the positive terminal connected to the analog output physical channel, such as ao0, and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_calref_vs_calref | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the internal calibration reference voltage.
_calref_vs_aignd | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_ao0_vs_calref | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the internal calibration reference voltage.
_ao1_vs_calref | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the internal calibration reference voltage.
_calSrcHi_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_calSrcHi_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM.
_calSrcMid_vs_aignd | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_calSrcMid_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM. _calSrcMid is the divided down version of _calSrcHi.
Parent topic: Internal Channels


Internal Channels for SC Express Devices

On an NI 4300 or NI 433x device, you can either acquire a signal present on the I/O connector, or you can acquire an onboard signal, via an internal multiplexer. The channels available on this multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels, you must use one of the device's AI physical channels (Dev1/ai0 through Dev1/ai7) when creating the virtual channel. The physical channel specifies the ADC for the internal channel. You can then set the appropriate string value on the Input Source channel attribute/property.

On the NI 4353, you can acquire internal channels by specifying their names for the physical channels input of the DAQmx Create Channel VI/function.

Parent topic: Internal Channels

Input Sources for the NI 4302 and 4303

Input Source | Description
_cjtemp | The temperature read by a digital temperature sensor located on the TB-4302 accessory. This channel is used for cold-junction compensation.

Input Sources for the NI 4300

Input Source | Description
_external_channel | The source of the AI channel is the device input connector, or an accessory connected to the device connector.
_aignd_vs_aignd | The source of the AI channel is the onboard ground signal.
_calref_vs_aignd | The source of the AI channel is the onboard reference signal.
_calSrcHi_vs_aignd | The source of the AI channel has the positive terminal connected to the onboard calibration PWM and the negative terminal connected to the onboard ground reference.
_aignd_vs_calSrcHi | The source of the AI channel has the positive terminal connected to the onboard ground reference and the negative terminal connected to the onboard calibration PWM.
_calref_vs_calSrcHi | The source of the AI channel has the positive terminal connected to the onboard reference signal and the negative terminal connected to the onboard calibration PWM.
_calSrcHi_vs_calSrcHi | The source of the AI channel has the positive and negative terminals connected to the onboard calibration PWM.
_aipos_vs_calSrcHi | The source of the AI channel has the positive terminal connected to the positive terminal of the device input connector and the negative terminal connected to the onboard calibration PWM.
_aineg_vs_calSrcHi | The source of the AI channel has the positive terminal connected to the negative terminal of the device input connector and the negative terminal connected to the onboard calibration PWM.

Input Sources for the NI 4330 and 4331

Input Source | Description
_external_channel | The source of the AI channel is the device input connector, or an accessory connected to the device connector.
_aignd_vs_aignd | The source of the AI channel is the onboard ground signal.

Input Sources for the NI 4339

Input Source | Description
_paired_channel_excitation | The source of the AI channel is the paired channel's internal excitation. The channel pairs are ai0 and ai1, ai2 and ai3, ai4 and ai5, ai6 and ai7.

Internal Channels for the NI 4353

On the NI 4353, you can acquire internal channels by specifying their names for the physical channels input of the DAQmx Create Channel VI/function.

Input Source | Description
_cjtemp0 through _cjtemp7 | A differential terminal with the positive and negative terminals connected to a temperature sensor located on the accessory. These channels are used for cold-junction compensation. The mapping between analog input channels and cold-junction compensation channels depends on the type of installed accessory.
_aignd_vs_aignd0 | A differential terminal with the positive and negative terminals both connected to the ground reference, using the ADC that is used for even-numbered channels (ai0, ai2, ai4, and so on). This channel is used to measure the autozero offset of even-numbered channels.
_aignd_vs_aignd1 | A differential terminal with the positive and negative terminals both connected to the ground reference, using the ADC that is used for odd-numbered channels (ai1, ai3, ai5, and so on). This channel is used to measure the autozero offset of odd-numbered channels.


SCXI Internal Channels

Some SCXI modules also have internal channels. These are physical channels that are not accessible from an I/O connector. To measure the signals present at these internal physical channels, use them to create virtual channels. The SCXI-1100, SCXI-1102, SCXI-1120, SCXI-1121, SCXI-1122, and SCXI-1125 modules have an internal physical channel called _cjTemp channel. It is the cold-junction compensation channel for measuring the temperature at the connector for thermocouples.

The SCXI-1112 has internal channels _cjTemp0, _cjTemp1, _cjTemp2, _cjTemp3, _cjTemp4, _cjTemp5, _cjTemp6, and _cjTemp7. These are the cold-junction compensation channels for each analog input channel on the SCXI-1112.

The SCXI-1520 has eight pairs of internal channels _pPos0 and _pNeg0 through _pPos7 and _pNeg7. These channels read back the excitation on the corresponding analog input channel. The pPos half of the pair is the positive side of the excitation, and the pNeg half is the negative side of the excitation. The real excitation value is the pPos value minus the pNeg value.

The SCXI-1521/B has 24 voltage excitation internal channels _Vex0 through _Vex23. These channels read back the excitation on the corresponding analog input channel. In addition, the SCXI-1521/B has 24 pairs of internal channels _IexPos0 and _IexNeg0 through _IexPos23 and _IexNeg23. The current through a sensor connected to channel x is the _IexPosx value minus the _IexNegx value.

Parent topic: Internal Channels


Internal Channels for USB DAQ Devices

The following table lists the internal channel for the USB-9211 device.

Internal Channel Name | Description
_cjtemp | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation.

The following table lists the internal channels for the USB-9219 device.

Internal Channel Name | Description
_cjtemp0 | A differential terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input. This channel is used for cold-junction compensation for analog input channel 0.
_cjtemp1 | This channel is used for cold-junction compensation for analog input channel 1.
_cjtemp2 | This channel is used for cold-junction compensation for analog input channel 2.
_cjtemp3 | This channel is used for cold-junction compensation for analog input channel 3.
Parent topic: Internal Channels


Internal Channels for X Series Multiplexed Sampling Devices

On an X Series device, you can either acquire a signal present on the I/O connector, or you can acquire a signal that is being generated from the internal calibration multiplexer. The channels available on this multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels on a X Series multiplexed sampling device, you must use the internal channel as the device's physical channel (for example, Dev1/_aignd_vs_aignd) when creating the virtual channel.

The following table describes all internal channels for X Series multiplexed sampling devices.

Internal Channel Name | Description
_aignd_vs_aignd | A single-ended terminal with the positive and negative terminals both connected to the ground reference for analog input.
_ao0_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_ao2_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao2 and the negative terminal connected to the ground reference for analog output.
_ao3_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao3 and the negative terminal connected to the ground reference for analog output.
_calref_vs_aignd | A single-ended terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_aignd_vs_aisense | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE.
_aignd_vs_aisense2 | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE2.
_aignd_vs_aisense3 | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE3.
_aignd_vs_aisense4 | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to physical channel AI SENSE4.
_calSrcHi_vs_aignd | A single-ended terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_calSrcHi_vs_calSrcHi | A differential terminal with the positive and negative terminals connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM.
_calSrcMid_vs_aignd | A single-ended terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_calSrcLo_vs_aignd | A single-ended terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcLo is the divided down version of _calSrcHi.
_ai0_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai0 and the negative terminal connected to the calibration PWM.
_ai8_vs_calSrcHi | A differential terminal with the positive terminal connected to physical channel ai8 and the negative terminal connected to the calibration PWM.
_boardTempSensor_vs_aignd | A single-ended terminal with the positive terminal connected to the onboard temperature sensor and the negative terminal connected to the ground reference for analog input.
Parent topic: Internal Channels
Related concepts
X Series Device Groupings


Internal Channels for X Series Simultaneous Sampling Devices

On an X Series device, you can either acquire a signal present on the I/O connector, or you can acquire a signal that is being generated from the internal calibration multiplexer. The channels available on this multiplexer are typically used for calibration purposes, but you can also sample them as you would a physical signal present on the I/O connector. To read from one of these internal channels on a X Series simultaneous sampling device, you must use one of the device's AI physical channels (for example, Dev1/ai0) when creating the virtual channel. The physical channel specifies the ADC for the internal channel. You can then set the appropriate string value on the Input Source channel attribute/property.

Note Note All X Series simultaneous sampling devices must have the same Input Source setting on all channels.
Internal Channel Name | Description
_external_channel | The differential terminal on the I/O connector that is typically used for acquiring data.
_aignd_vs_aignd | A single-ended terminal with the positive and negative terminals both connected to the ground reference for analog input.
_ao0_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao0 and the negative terminal connected to the ground reference for analog output.
_ao1_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao1 and the negative terminal connected to the ground reference for analog output.
_ao2_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao2 and the negative terminal connected to the ground reference for analog output.
_ao3_vs_aognd | A differential terminal with the positive terminal connected to physical channel ao3 and the negative terminal connected to the ground reference for analog output.
_calref_vs_aignd | A single-ended terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the ground reference for analog input.
_calSrcHi_vs_aignd | A single-ended terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input.
_calref_vs_calSrcHi | A differential terminal with the positive terminal connected to the internal calibration reference voltage and the negative terminal connected to the calibration PWM.
_aignd_vs_calSrcHi | A differential terminal with the positive terminal connected to the ground reference for analog input and the negative terminal connected to the calibration PWM.
_calSrcMid_vs_aignd | A single-ended terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to the ground reference for analog input. _calSrcMid is the divided down version of _calSrcHi.
_calSrcHi_vs_ai0 | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to physical channel ai0.
_calSrcHi_vs_ai8 | A differential terminal with the positive terminal connected to the calibration PWM and the negative terminal connected to physical channel ai8.
Parent topic: Internal Channels
Related concepts
X Series Device Groupings


Default Input/Output Terminal Configurations

If you do not explicitly specify the input or output terminal configuration when you create a channel, NI-DAQmx automatically determines the default terminal configuration at run time. The following table lists the default terminal configurations for devices.

Device | Default Input Terminal Configuration | Default Output Terminal Configuration
AO Series | N/A | Referenced single-ended
DSA | Pseudodifferential | Differential
NI 60xx (E Series), NI 62xx (M Series), NI 63xx (X Series), NI ELVIS II, NI PCI-6010, NI USB-6001, NI USB-6002, NI USB-6003, NI USB-6008, NI USB-6009, and NI TC01 | For devices with eight channels: differential for the first four channels, referenced single-ended for the next four channels. For devices with 16 channels or more: differential for eight channels followed by referenced single-ended for eight channels. For instance, channels 0-7, 16-23, and 32-39 are differential. Channels 8-15, 24-31, and 40-47 are referenced-single ended. | Referenced single-ended
myDAQ | Differential for the analog input channels, referenced single-ended for the audio input channels. | Referenced single-ended
NI ELVIS II+ | Referenced single-ended for scopeCh0 and scopeCh1. For other analog input channels: differential for channels 0-7, referenced single-ended for channels 8-15. | Referenced single-ended
NI USB-6000 | Referenced single-ended | N/A
NI PXI-6132, NI PXI-6133, NI PXI-6143 | Differential | N/A
NI PCI-6110, NI PCI-6111, NI 6115, NI 6120 | Pseudodifferential | Referenced single-ended
NI PXI-42xx | Differential | N/A
SCC | Non-referenced single-ended | Referenced single-ended
SC Express | Differential. On the NI 4353, the cold-junction compensation channels are referenced single ended by default. | N/A
SCXI | Differential | Differential
NI 9201, NI USB-9201, NI 9203, NI 9208, NI 9217, NI 9221, NI USB-92211 | Referenced single-ended | N/A
NI 9207 | Differential for voltage channels, referenced single-ended for current channels | N/A
NI 9205, NI 9206, and NI 9209 | For devices with 16 channels or more: differential for eight channels followed by referenced single-ended for eight channels. For instance, channels 0-7, 16-23, and 32-39 are differential. Channels 8-15, 24-31, and 40-47 are referenced-single ended. | N/A
NI 9210, NI 9211, NI ENET-9211, NI USB-9211A, NI WLS-9211, NI 9212, NI 9213, NI ENET-9213, NI USB-9213, NI WLS-9213, NI 9215, NI ENET-9215, NI USB-9215A, NI WLS-9215, NI 9216, NI 9218, NI 9219, NI ENET-9219, NI USB-9219, NI WLS-9219, NI 9220, NI 9225, NI 9226, NI 9227, NI 9229, NI USB-9229, NI 9235, NI 9236, NI 9237, NI ENET-9237, NI USB-9237, NI WLS-9237, NI 9238, NI 9239, NI USB-9239, NI 9246, NI 9247, NI 92511 | Differential | N/A
NI 9230, NI 9232, NI 9233, NI USB-9233, NI 9234, NI ENET-9234, NI USB-9234, NI WLS-9234 | Pseudodifferential | N/A
NI 9242, NI 9244 | Nonreferenced single-ended for ai0, ai1, and ai2. Referenced single-ended for neutral. |
NI 9263, NI USB-9263, NI 9264, NI USB-9264, NI 9265, and NI USB-9265 | N/A | Referenced single-ended
NI 9269 | N/A | Differential
Parent topic: Physical Channels
1 All listed devices have a fixed terminal configuration


Terminal Configurations (Analog Input Ground Reference Settings) for Isolated Devices

You can use differential, referenced single-ended (RSE), or nonreferenced single-ended (NRSE) terminal configurations (or analog input ground reference settings) for isolated devices.

The following figure shows a differential measurement system. For illustrations of other terminal configurations, refer to your device documentation.

RSE and NRSE measurement systems are the same for isolated devices in that the measurement is made with respect to a floating or isolated ground, AI GND. AI GND is the floating reference for all RSE and NRSE channels. AI GND is isolated from earth ground through an isolation barrier on the device.

It is important to keep within the specifications of your device to avoid hazardous conditions. It is considered improper use of the device to surpass the specifications, and the device is no longer considered to be in safe use. Isolated devices specify a continuous working isolation voltage that specifies the maximum voltage difference allowed between any of the input signals to the chassis/earth ground. For example, a product rated for 60 VDC of continuous working isolation that has a voltage difference of +51 VDC between AIGND and the chassis/earth ground cannot have a signal greater than +9 VDC when referenced to a AIGND or 60 VDC when reference to chassis/earth ground at its input terminals.

Parent topic: Physical Channels


Routing

This section contains information about routing for AO Series, E Series, S Series, and TIO devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Routing Considerations for AO Series Devices
Routing Considerations for E Series and S Series Devices
Routing Considerations for TIO Devices


Routing Considerations for AO Series Devices

The counters on these devices are very versatile and in many cases can route signals across subsystems. They can also be used to route signals to/from the I/O connector. However, when a counter is used as part of a route, you may not be able to use the counter for other applications while the route remains reserved. Most routes do not require an internal counter terminal, but many advanced routes do. For example, if you want to use the signal present at PFI 4 on Dev1 as the Start Trigger for an acquisition on Dev2, you simply need to specify /Dev1/PFI4 as the source of the trigger. However, to make the route, the signal is internally routed from /Dev1/PFI4 to /Dev1/Ctr0Source to a RTSI bus line or PXI_Trig to Dev2/ai/StartTrigger. These terminals need not be explicitly specified when programming the route. In this case, it is not obvious that a counter terminal is used to make the route. Subsequent attempts at using the counter while it is in use result in a routing reservation error. To see if the route you are making uses counter resources, consult the table displayed under the Device Routes tab in MAX.

Parent topic: Routing


Routing Considerations for E Series and S Series Devices

  • PFI 0—When exporting a signal through task-based routing to most PFI terminals, the route is reserved and committed with the task. When the task goes back to a verified state, software resources for the route are released, but the route remains in place in hardware. It remains in place to prevent glitching on the PFI terminal and to prevent any unexpected effects on external circuitry monitoring the signal. However, PFI 0 is an exception to this rule. Because PFI 0 can accept both analog and digital signals, it tristates when the task is not in the committed or running state. This behavior is intended to prevent accidental connections of an analog signal directly to digital circuitry that could damage the device.
    Note Note PFI 0 accepts only digital signals on the NI 6154.
    When in use, the analog trigger circuitry takes over the PFI 0 terminal internal to the device. Because of this, you cannot use PFI 0 to route any digital signals when using the analog trigger, regardless of whether you are triggering off of PFI 0 or an analog input channel. If you try to use PFI 0 for digital signals and the analog trigger at the same time, you receive a routing error.
  • Counters—The counters on these devices are very versatile and in many cases can route signals across subsystems. They can also be used to route signals to/from the I/O connector. However, when a counter is used as part of a route, you may not be able to use the counter for other applications while the route remains reserved. Most routes do not require an internal counter terminal, but many advanced routes do. For example, if you want to use the signal present at PFI 4 on Dev1 as the Start Trigger for an acquisition on Dev2, you simply need to specify /Dev1/PFI4 as the source of the trigger. However, to make the route, the signal is internally routed from /Dev1/PFI4 to /Dev1/Ctr0Source to a RTSI bus line or PXI_Trig to Dev2/ai/StartTrigger. These terminals need not be explicitly specified when programming the route. In this case, it is not obvious that a counter terminal is used to make the route. Subsequent attempts at using the counter while it is in use result in a routing reservation error. To see if the route you are making uses counter resources, consult the table displayed under the Device Routes tab in MAX.
Parent topic: Routing


Routing Considerations for TIO Devices

Though TIO counters can receive signals from any of the PFI lines, NI-DAQmx uses internal resources to connect some PFIs to counter inputs. There are some PFI lines that do not use internal resources that are preferred for use with different counter signals.

  • CtrnAux —PFI 37, PFI 33, PFI 29, PFI 25, PFI 21, PFI 17, PFI 13, PFI 9
  • CtrnGate—PFI 38, PFI 34, PFI 30, PFI 26, PFI 22, PFI 18, PFI 14, PFI 10
  • CtrnSource—PFI 39, PFI 35, PFI 31, PFI 27, PFI 23, PFI 19, PFI 15, PFI 11

For output, the same rules apply. Though the counter can output on any PFI line, there are a subset of preferred PFIs that do not use internal resources to make the routes.

  • CtrnInternalOutput—PFI 36, PFI 32, PFI 28, PFI 24, PFI 20, PFI 16, PFI 12, PFI 8

To see if the route you are making uses internal resources, consult the table displayed under the Device Routes tab in MAX.

Parent topic: Routing


Switches

This section contains information specific to switch devices about API support and switching capacity, including switching voltage, switching current, and switching power.

Parent topic: NI-DAQmx Device Considerations
Related concepts
API Support for Switch Modules
Switching Capacity
Switching Voltage
Switching Current
Switching Power


API Support for Switch Modules

Switch modules can support any of four different ways to control their relays. You may use the APIs interchangeably, but NI recommends using a single API for each application.

  • Digital Output—Create your tasks, either programmatically with the Create Channel Digital Output function/VI or interactively through the DAQ Assistant, using the digital output physical channels. Use the digital versions of the Write function/VI to control the relays. Each digital port consists of 32 digital lines, and each line represents a relay on the switch. For example, if a module contains 64 relays, the first 32 are on port 0, and the rest will be on port 1. Writing a 0 to a digital line opens the relay and writing a 1 closes it.
  • Immediate—The immediate API, supported by all switches, provides a switch channel-based interaction recommended for nonscanning operations. Functions/VIs such as DAQmx Switch Connect and DAQmx Switch Disconnect are considered part of the immediate API.
  • Relay—The relay API provides a relay-based interaction. Functions/VIs like DAQmx Switch Open Relays and DAQmx Switch Close Relays are considered part of the relay API.
  • Scanning—Scanning is a method of connecting channels and is often used when connecting instruments and devices under test (DUTs) in a specific order. In this operation mode, the switch cycles through each entry in a scan list downloaded to the switch. The triggers the switch receives initiate this cycling. Create scanning tasks using DAQmx Switch Create Scan List and control tasks using functions/VIs like DAQmx Start, DAQmx Stop, and so on.
Parent topic: Switches

Supported Topologies

Every switch module supports one or more topologies. Changing the topology alters the functionality of the switch and, in many cases, changes the list of supported channel names.

Special Considerations

Some switch modules have specific behaviors that you must consider when developing applications. These are described in the following table.

Device Supported APIs Supported Topologies
  • NI 2810A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2810/1-Wire 4×43 Matrix
  • NI 2811A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2811/1-Wire 8×21 Matrix
  • NI 2812A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2812/1-Wire 16x9 Matrix
  • NI 2813A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2813/2-Wire 4x21 Matrix
  • NI 2814A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2814/2-Wire 8x9 Matrix
  • NI 2815A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2815/1-Wire 4×86 Matrix
  • NI 2816A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2816/1-Wire 8×46 Matrix
  • NI 2817A/B
  • Reed Matrix for NI SwitchBlock
  • Immediate
  • Relay
2817/1-Wire 16x22 Matrix
  • NI 2833
  • Electromechanical Latching Matrix for NI SwitchBlock
  • Immediate
  • Relay
2833/2-Wire 4x71 Matrix
  • NI 2834
  • Electromechanical Latching Matrix for NI SwitchBlock
  • Immediate
  • Relay
2834/2-Wire 8x34 Matrix
  • NI 2865
  • Matrix with Analog Bus Protection for NI SwitchBlock
  • Immediate
  • Relay
2865/1-Wire 4x84 Matrix
  • PXI-2501
  • 24-Channel FET
  • Multiplexer/Matrix
  • Immediate
  • Relay
  • Scanning
  • 2501/1-Wire 48x1 Mux
  • 2501/1-Wire 48x1 Amplified Mux
  • 2501/2-Wire 24x1 Mux
  • 2501/2-Wire 24x1 Amplified Mux
  • 2501/2-Wire Dual 12x1 Mux
  • 2501/2-Wire Quad 6x1 Mux
  • 2501/2-Wire 4x6 Matrix
  • 2501/4-Wire 12x1 Mux
  • PXI-2503
  • 24-Channel Relay
  • Multiplexer/Matrix
  • Immediate
  • Relay
  • Scanning
  • 2503/1-Wire 48x1 Mux
  • 2503/2-Wire 24x1 Mux
  • 2503/2-Wire Dual 12x1 Mux
  • 2503/2-Wire Quad 6x1 Mux
  • 2503/2-Wire 4x6 Matrix
  • 2503/4-Wire 12x1 Mux
  • PXI-2510
  • 68-Channel 2A Fault Insertion Unit
  • Immediate
  • Relay
  • Scanning
Independent
  • PXI-2512, NI PXIe-2512
  • 7-Channel 10A Fault Insertion Unit
  • Immediate
  • Relay
  • Scanning
Independent
  • PXI-2514, NI PXIe-2514
  • 7-Channel 40A Fault Insertion Unit
  • Immediate
  • Relay
  • Scanning
Independent
  • PXI-2515, NI PXIe-2515
  • High-Speed Digital I/O Signal Insertion Switch
  • Immediate
  • Relay
  • Scanning
Independent
  • PXI-2520
  • 80-Channel SPST Relay Module
  • Immediate
  • Relay
  • Scanning
  • 80-SPST Switch
  • PXI-2521
  • 40-Channel DPST Relay Module
  • Immediate
  • Relay
  • Scanning
  • 40-DPST Switch
  • PXI-2522
  • 53-Channel SPDT Relay Module
  • Immediate
  • Relay
  • Scanning
53-SPDT Switch
  • PXI-2523
  • 26-Channel DPDT Relay Module
  • Immediate
  • Relay
  • Scanning
26-DPDT Switch
  • PXI-2527
  • 32-Channel 300 V Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 2527/1-Wire 64x1 Mux
  • 2527/1-Wire Dual 32x1 Mux
  • 2527/2-Wire 32x1 Mux
  • 2527/2-Wire Dual 16x1 Mux
  • 2527/4-Wire 16x1 Mux
  • 2527/Independent
  • PXI-2529
  • 128-Crosspoint Relay Matrix
  • Immediate
  • Relay
  • Scanning
  • 2529/2-Wire 8x16 Matrix
  • 2529/2-Wire 4x32 Matrix
  • 2529/2-Wire Dual 4x16 Matrix
  • PXI-2530
  • 128-Channel Reed Relay
  • Multiplexer/Matrix
  • Immediate
  • Relay
  • Scanning
  • 2530/1-Wire 128x1 Mux
  • 2530/1-Wire Dual 64x1 Mux
  • 2530/2-Wire 64x1 Mux
  • 2530/4-Wire 32x1 Mux
  • 2530/1-Wire 4x32 Matrix
  • 2530/1-Wire 8x16 Matrix
  • 2530/1-Wire Octal 16x1 Mux
  • 2530/1-Wire Quad 32x1 Mux
  • 2530/2-Wire 4x16 Matrix
  • 2530/2-Wire Dual 32x1 Mux
  • 2530/2-Wire Quad 16x1 Mux
  • 2530/4-Wire Dual 16x1 Mux
  • 2530/Independent
  • PXI-2531, NI PXIe-2531
  • 512-Crosspoint Matrix
  • Immediate
  • Relay
  • Scanning
  • 2531/1-Wire 4x128 Matrix
  • 2531/1-Wire 8x64 Matrix
  • 2531/1-Wire Dual 4x64 Matrix
  • 2531/1-Wire Dual 8x32 Matrix
  • PXI-2532
  • 512-Crosspoint Matrix
  • Immediate
  • Relay
  • Scanning
  • 2532/1-Wire 16x32 Matrix
  • 2532/1-Wire 4x128 Matrix
  • 2532/1-Wire 8x64 Matrix
  • 2532/1-Wire Dual 16x16 Matrix
  • 2532/1-Wire Dual 4x64 Matrix
  • 2532/1-Wire Dual 8x32 Matrix
  • 2532/1-Wire Sixteen 2x16 Matrix
  • 2532/2-Wire 16x16 Matrix
  • 2532/2-Wire 4x64 Matrix
  • 2532/2-Wire 8x32 Matrix
  • PXI-2533
  • 256-Crosspoint SSR Matrix
  • Immediate
  • Relay
  • Scanning
2533/1-Wire 4x64 Matrix
  • PXI-2534
  • 256-Crosspoint SSR Matrix
  • Immediate
  • Relay
  • Scanning
2534/1-Wire 8x32 Matrix
  • PXI-2535
  • 544-Crosspoint FET Matrix
  • Immediate
  • Relay
  • Scanning
2535/1-Wire 4x136 Matrix
  • PXI-2536
  • 544-Crosspoint FET Matrix
  • Immediate
  • Relay
  • Scanning
2536/1-Wire 8x68 Matrix
  • PXI-2542, NI PXIe-2542
  • Quad Terminated 2x1 Multiplexer
  • Immediate
  • Relay
  • Scanning
2542/Quad 2x1 Terminated Mux
  • PXI-2543, NI PXIe-2543
  • Dual Terminated 4x1 Multiplexer
  • Immediate
  • Relay
  • Scanning
2543/Dual 4x1 Terminated Mux
  • NI PXI-2544, NI PXIe-2544
  • Terminated 8x1 Multiplexer
  • Immediate
  • Relay
  • Scanning
2544/8x1 Terminated Mux
  • PXI-2545
  • 2.7 GHz 4x1 Terminated 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2545/4x1 Terminated Mux
  • PXI-2546
  • 2.7 GHz Dual 4x1 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2546/Dual 4x1 Mux
  • PXI-2547
  • 2.7 GHz 8x1 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2547/8x1 Mux
  • PXI-2548
  • 2.7 GHz 4-SPDT 50 Ohm Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2548/4-SPDT
  • PXI-2549
  • 2.7 GHz Terminated 2-SPDT 50 Ohm Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2549/Terminated 2-SPDT
  • PXI-2554
  • 2.5 GHz 4x1 75 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2554/4x1 Mux
  • PXI-2555
  • 2.5 GHz 4x1 Terminated 75 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2555/4x1 Terminated Mux
  • PXI-2556
  • 2.5 GHz Dual 4x1 75 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2556/Dual 4x1 Mux
  • PXI-2557
  • 2.5 GHz 8x1 75 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2557/8x1 Mux
  • PXI-2558
  • 2.5 GHz 4-SPDT 75 Ohm Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2558/4-SPDT
  • PXI-2559
  • 2.5 GHz Terminated 2-SPDT 75 Ohm Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2559/Terminated 2-SPDT
  • PXI-2564
  • 16-SPST Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2564/8-DPST
  • 2564/16-SPST
  • PXI-2565
  • 16-SPST Power Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2565/16-SPST
  • PXI-2566
  • 16-SPDT Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2566/8-DPDT
  • 2566/16-SPDT
  • PXI-2567
  • 64-Channel Relay Driver Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2567/Independent
  • PXI-2568
  • 31-Channel SPST Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2568/15-DPST
  • 2568/31-SPST
  • PXI-2569
  • 100-Channel SPST Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2569/50-DPST
  • 2569/100-SPST
  • PXI-2570
  • 40-Channel SPDT Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2570/20-DPDT
  • 2570/40-SPDT
  • PXI-2571
  • 66-Channel SPDT Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
2571/66-SPDT
  • PXI-2575
  • 196x1 Relay Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 2575/1-Wire 196x1 Mux
  • 2575/2-Wire 98x1 Mux
  • 2575/2-Wire 95x1 Mux
  • PXI-2576
  • Multi-Bank Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 2576/2-Wire Octal 8x1 Mux
  • 2576/2-Wire Sixteen 4x1 Mux
  • PXI-2584
  • High-Voltage Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 2584/Independent
  • 2584/1-Wire 12x1 Mux
  • 2584/1-Wire Dual 6x1 Mux
  • 2584/2-Wire 6x1 Mux
  • PXI-2585
  • 10-Channel Multiplexer
  • Immediate
  • Relay
  • Scanning
2585/1-Wire 10x1 Mux
  • PXI-2586
  • 10-Channel SPST Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 2586/5-DPST
  • 2586/10-SPST
  • PXI-2590
  • 1.3 GHz 4x1 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
2590/4x1 Mux
  • PXI-2591
  • 4 GHz 4x1 50 Ohm Multiplexer
  • Immediate
  • Scanning
2591/4x1 Mux
  • PXI-2593
  • 500 MHz Dual 8x1 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 2593/16x1 Mux
  • 2593/Dual 8x1 Mux
  • 2593/8x1 Terminated Mux
  • 2593/Dual 4x1 Terminated Mux
  • 2593/Independent
  • PXI-2594
  • 1x4 2.5 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
2594/4x1 Mux
  • PXI-2595
  • 1x4 5.5 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
2595/4x1 Mux
  • PXI-2596
  • Dual 1x6 26.5 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
2596/Dual 6x1 Mux
  • PXI-2597
  • 1x6 26.5 GHz Terminated Multiplexer
  • Immediate
  • Relay
  • Scanning
2597/6x1 Terminated Mux
  • PXI-2598
  • Dual 26.5 GHz Transfer Switch
  • Immediate
  • Relay
  • Scanning
2598/Dual Transfer
  • PXI-2599
  • Dual 26.5 GHz SPDT
  • Immediate
  • Relay
  • Scanning
2599/2-SPDT
  • PXIe-2720
  • Ten 8-Bit Channel Resistor Module
  • Immediate
  • Relay
  • Scanning
Independent
  • PXIe-2722
  • Five 16-Bit Channel Resistor Module
  • Immediate
  • Relay
  • Scanning
Independent
  • PXIe-2725
  • Eighteen 8-Bit Channel Resistor Module
  • Immediate
  • Relay
  • Scanning
Independent
  • PXIe-2727
  • Nine 16-bit Channel Resistor Module
  • Immediate
  • Relay
  • Scanning
Independent
  • PXIe-2790
  • RF Power Combiner and Switch
  • Immediate
  • Relay
  • Scanning
Independent
  • PXIe-2796
  • Dual 6x1 40 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
2796/Dual 6x1 Mux
  • PXIe-2797
  • 6x1 40 GHz Terminated Multiplexer
  • Immediate
  • Relay
  • Scanning
2797/6x1 Terminated Mux
  • PXIe-2798
  • Dual 40 GHz Transfer Switch
  • Immediate
  • Relay
  • Scanning
2798/Dual Transfer
  • PXIe-2799
  • Dual 40 GHz SPDT
  • Immediate
  • Relay
  • Scanning
2799/2-SPDT
  • SCXI-1127
  • 32-Channel Relay Multiplexer/Matrix
  • See SCXI-1127 Considerations
  • Immediate
  • Relay
  • Scanning
  • 1127/1-Wire 64x1 Mux
  • 1127/2-Wire 32x1 Mux
  • 1127/4-Wire 16x1 Mux
  • 1127/2-Wire 4x8 Matrix
  • SCXI-1128
  • 32-Channel Solid-State Relay (SSR)
  • Multiplexer/Matrix
  • See SCXI-1128 Considerations
  • Immediate
  • Relay
  • Scanning
  • 1128/1-Wire 64x1 Mux
  • 1128/2-Wire 32x1 Mux
  • 1128/4-Wire 16x1 Mux
  • 1128/2-Wire 4x8 Matrix
  • 1128/Independent
  • SCXI-1129
  • 256-Crosspoint Relay Matrix
  • Immediate
  • Relay
  • Scanning
  • 1129/2-Wire 16x16 Matrix
  • 1129/2-Wire 8x32 Matrix
  • 1129/2-Wire 4x64 Matrix
  • 1129/2-Wire Dual 8x16 Matrix
  • 1129/2-Wire Dual 4x32 Matrix
  • 1129/2-Wire Quad 4x16 Matrix
  • SCXI-1130
  • 256-Channel Reed Relay
  • Multiplexer/Matrix
  • Immediate
  • Relay
  • Scanning
  • 1130/1-Wire 256x1 Mux
  • 1130/1-Wire Dual 128x1 Mux
  • 1130/2-Wire 128x1 Mux
  • 1130/4-Wire 64x1 Mux
  • 1130/1-Wire 4x64 Matrix
  • 1130/1-Wire 8x32 Matrix
  • 1130/1-Wire Octal 32x1 Mux
  • 1130/1-Wire Quad 64x1 Mux
  • 1130/1-Wire Sixteen 16x1 Mux
  • 1130/2-Wire 4x32 Matrix
  • 1130/2-Wire Octal 16x1 Mux
  • 1130/2-Wire Quad 32x1 Mux
  • 1130/4-Wire Quad 16x1 Mux
  • 1130/Independent
  • SCXI-1160
  • 16-SPDT General-Purpose Relay Module
  • Digital Output
  • Immediate
  • Relay
1160/16-SPDT
  • SCXI-1161
  • 8-SPDT Power Relay Module
  • Digital Output
  • Immediate
  • Relay
1161/8-SPDT
  • SCXI-1163R
  • 32-Channel SSR
  • Digital Output
  • Immediate
  • Relay
1163R/Octal 4x1 Mux
  • SCXI-1166
  • 32-SPDT Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 1166/16-DPDT
  • 1166/32-SPDT
  • SCXI-1167
  • 64-Channel Relay Driver Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
1167/Independent
  • SCXI-1169
  • 100-Channel SPST Relay Module
  • Digital Output
  • Immediate
  • Relay
  • Scanning
  • 1169/50-DPST
  • 1169/100-SPST
  • SCXI-1175
  • 196x1 Relay Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 1175/1-Wire 196x1 Mux
  • 1175/2-Wire 98x1 Mux
  • 1175/2-Wire 95x1 Mux
  • SCXI-1190
  • 1.3 GHz Quad 4x1 50 Ohm Multiplexer
  • Immediate
1190/Quad 4x1 Mux
  • SCXI-1191
  • 4 GHz Quad 4x1 50 Ohm Multiplexer
  • Immediate
1191/Quad 4x1 Mux
  • SCXI-1192
  • 18 GHz 8-SPDT 50 Ohm Relay Module
  • Digital Output
  • Immediate
  • Relay
1192/8-SPDT
  • SCXI-1193
  • 500 MHz Quad 8x1 50 Ohm Multiplexer
  • Immediate
  • Relay
  • Scanning
  • 1193/32x1 Mux
  • 1193/Dual 16x1 Mux
  • 1193/Quad 8x1 Mux
  • 1193/16x1 Terminated Mux
  • 1193/Dual 8x1 Terminated Mux
  • 1193/Quad 4x1 Terminated Mux
  • 1193/Independent
  • SCXI-1194
  • Quad 1x4 2.5 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
1194/Quad 4x1 Mux
  • SCXI-1195
  • Quad 1x4 5.5 GHz Multiplexer
  • Immediate
  • Relay
  • Scanning
1195/Quad 4x1 Mux

SCXI-1127 Considerations

To route signals to the analog bus backplane, you must enable the switch device property AutoConnAnlgBus. As a result, if you connect a channel (ch1) to the common channel (com0), the signal is automatically routed from com0 to the analog bus (ab0).

The device supports only continuous scanning.

If you have used immediate or relay operations to change relay states before starting a scan, all of those relays are opened when the scan starts. After the scan completes, the relays are returned to their previous state prior to the scan.

Early revisions of this hardware reserve the SCXI_TRIG1 line. If you place an older revision of this hardware (earlier than revision E) into an SCXI chassis that also contains an SCXI analog input module that performs track and hold (such as the SCXI-1140 or SCXI-1520), you may get reservation errors when trying to use the SCXI analog input module.

SCXI-1128 Considerations

To route signals to the analog bus backplane, you must enable the switch device property AutoConnAnlgBus. As a result, if you connect a channel (ch1) to the common channel (com0), the signal is automatically routed from com0 to the analog bus (ab0).

The device supports only continuous scanning.

If you have used immediate or relay operations to change relay states before starting a scan, all of those relays are opened when the scan starts. After the scan completes, the relays are returned to their previous state prior to the scan.


Switching Capacity

Signal levels through a switch must account for the following specifications:

  • Switching voltage
  • Switching current
  • Switching power

The following figure shows the valid operating range defined by these limits.

Parent topic: Switches
Related concepts
Switching Voltage
Switching Current
Switching Power


Switching Current

Switching current is the maximum rated current that can flow through the switch as it makes or breaks a contact. Switching active currents higher than those specified in the switch documentation can result in arcing that can damage the contacts of electromechanical relays. A minimum current specification indicates the smallest current that can reliably flow through the switch.

Switches can also have carry current. Carry current is the maximum rated current that can pass through a closed switch, or the current that a switch can carry. Carry current can be larger than switching current. However, since carry current can only flow while the switch is closed, the current needs to be stopped while the switch operates.

Parent topic: Switching Capacity


Switching Power

Switching power is the limit on the combined open-contact voltage and closed-contact current of a signal in the switch.

Switching Power = Switching Voltage * Switching Current

Switching high-power signals causes high-energy arcing at the electromechanical contacts during actuation, reducing the useful life of the switch.

Parent topic: Switching Capacity


Switching Voltage

Switching voltage refers to the maximum signal voltage that the switch module can safely maintain. Switching voltage is defined from channel-to-ground and from channel-to-channel. Channel-to-ground is the voltage potential between the signal line and the grounded chassis. Channel-to-channel is the voltage potential between any pair of signal lines within the module. This voltage includes voltages across open relay contacts, as well as voltages between adjacent connection terminals.

Note Note CE marking for measurement and control devices requires compliance to the IEC 61010-1 standard. Switch modules intended for high-voltage signals (> 60 VDC / 30 Vrms ) are rated for Measurement Categories as defined in this standard. Measurement Categories describe the acceptable transient overvoltages and fault protection necessary for safe operation. Refer to the NI Switches Getting Started Guide for more information on Measurement Categories.
Parent topic: Switching Capacity


Synchronization

This section contains information on synchronizing multiple devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Synchronizing E Series, S Series, and AO Series Devices
Synchronizing DSA Devices with Multifunction DAQ Devices
Synchronizing DSA Devices
Synchronization with M Series USB and NI ELVIS II Family Devices
PXI_CLK 10 with the NI 6608 and the NI 6614
Synchronizing X Series, M Series, and SC Express Devices
Supported Devices for Trigger Skew Correction


Synchronizing DSA Devices

You can synchronize the analog input and output operations on two or more DSA devices to extend the channel count of DSA measurements. Refer to the NI Dynamic Signal Acquisition User Manual, which you can find at ni.com/manuals, for additional DSA synchronization information.

Parent topic: Synchronization
Related information
ni.com/manuals


Synchronizing DSA Devices with Multifunction DAQ Devices

You can use Sample Clock synchronization to synchronize DSA devices with Multifunction DAQ devices. However, synchronization creates phase delay between the devices.

Parent topic: Synchronization
Related concepts
Sample Clock Synchronization


Synchronizing X Series, M Series, and SC Express Devices

Note Note To synchronize analog input tasks on multiple X Series and SC Express devices at the same sampling rate, you can use channels from those devices within the same task.

X Series, M Series, and SC Express devices support the following synchronization methods:

  • Start Trigger synchronization
  • Reference Clock synchronization
  • Sample Clock synchronization

Refer to the Device Routes tab in MAX to determine which PXI and RTSI lines can route synchronization signals.

Note Note You cannot use a RTSI cable to connect multiple USB X Series devices.
Note Note The NI 4302/4303/4304/4305/4330/4331, and 4339 only support exporting their sample clock. They do not support importing a sample clock
Note Note The NI 4340 supports importing a sample clock only in hardware-timed single-point sample mode.
Parent topic: Synchronization
Related concepts
Multidevice Tasks
Start Trigger Synchronization
Reference Clock Synchronization
Sample Clock Synchronization


Synchronizing E Series, S Series, and AO Series Devices

E Series, S Series, and AO Series devices support the following synchronization methods:

  • Start Trigger synchronization
  • Master Timebase synchronization
  • Sample Clock synchronization

NI PCI-6154 and NI PXIe-6124 devices support the following synchronization methods:

  • Start Trigger synchronization
  • Reference Clock synchronization
  • Sample Clock synchronization

Refer to the Device Routes tab in MAX to determine which PXI and RTSI lines can route synchronization signals.

Parent topic: Synchronization
Related concepts
Start Trigger Synchronization
Master Timebase Synchronization
Sample Clock Synchronization
Reference Clock Synchronization


PXI_CLK 10 with the NI 6608 and the NI 6614

When NI-DAQmx detects that an NI 6608 is installed in slot 2 (or when an NI 6614 is installed in the system timing slot), NI-DAQmx automatically overrides the chassis PXI_CLX10 with the more stable oven controlled oscillator (OCXO) from the NI 6608 or NI 6614. This allows all devices in the chassis to inherit the OCXO accuracy and stability via the PXI_CLK10 signal. In a PXIe chassis, the PXIe_Clk100 signal is phase-locked to the PXI_CLK10, so PXIe_Clk100 will also inherit the OCXO accuracy and stability.

Refer to the NI 6608 documentation for more information about the stability of the OCXO.

Note Note For the automatic override to occur in NI-DAQmx, you must put the NI 6608 in slot 2 or the NI 6614 in the system timing slot. For more information about configuring your PXI chassis, refer to the Measurement & Automation Explorer Help for PXI.
Parent topic: Synchronization


Synchronization with M Series USB and NI ELVIS II Family Devices

M Series USB and NI ELVIS II Family devices do not support reference clock synchronization.

Parent topic: Synchronization


Supported Devices for Trigger Skew Correction

The following devices support locking synchronized triggers to a clock to compensate for skew.

  • SC Express devices
  • X Series devices
Parent topic: Synchronization
Related concepts
Trigger Skew Correction


Timing

This section contains information about timing for AO Series, C Series, DSA, E Series, M Series USB, NI ELVIS II Family, S Series, and SC Express devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Timing Considerations for AO Series Devices
Timing Considerations for C Series Devices
Timing Considerations for DSA Devices
Timing Considerations for E Series Devices
Timing Considerations with NI ELVIS II Family and M Series USB Devices
Timing Considerations for S Series
Timing Considerations for SC Express Devices
Hardware-Timed Non-Buffered Sample Mode
Non-Buffered Change Detection
Sample Rate Considerations
Sample Clock-Timed Pulse Train Generation
Device-Specific Sampling Methods
Timing Considerations for X Series Devices
Timing Considerations with Standalone NI CompactDAQ Systems


Timing Considerations for AO Series Devices

When using an external ao/SampleClock for finite generations, you need to provide one more sample clock pulse than the number of samples in the generation. The Wait Until Done function/VI uses the extra sample clock to indicate the task is complete. For example, if you want to generate 1000 samples using an external sample clock, the first 1000 samples clocks you provide generates all of the samples, but you need to provide 1001 sample clock pulses for the Wait Until Done function/VI to indicate the task is done. If you are trying to synchronize an analog output generation with another acquisition or generation by sharing a common clock, use the ao/SampleClock as the master clock, or key off of the generation or acquisition providing the master clock to determine when the generation is complete.

Static AO devices, such as the NI 6703 and NI 6704, do not have hardware timing and have multiplexed output. Refer to your device documentation for specifics concerning your device.

Parent topic: Timing


Timing Considerations for C Series Devices

Note Note C Series devices do not support hardware-timed single-point sample mode or Wait for Next Sample Clock.
Parent topic: Timing
Related concepts
C Series Delta-Sigma Devices
C Series Scanned Devices
C Series Slow Sample Devices
Digital I/O Considerations for C Series Devices

Analog Input Timing Considerations for C Series Devices

You can use multiple analog input devices of different types in the same task, and NI-DAQmx automatically synchronizes them. NI-DAQmx supports only one analog input task at a time per NI cDAQ-9171, 9172, 9181, and 9191 chassis and up to three analog input tasks at a time per NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis.

  • AI Convert Clock Considerations

    C Series Scanned devices, such as the NI 9201, NI 9205, and NI 9221, use multiplexed sampling controlled by a per-slot AI Convert Clock. If you have multiple devices in one task, their AI Convert Clocks run in parallel, which may cause channels on multiple devices to be sampled at the same time. You can set the AI Convert Rate and the Delay From Sample Clock differently on each device. When setting AI Convert instances of the DAQmx Timing attribute/property, you must use the ActiveDev attribute/property to specify the device to which you are referring. External clocking of the AI Convert Clock is not supported.

  • Sampling Rate Considerations

    The default AI Convert Clock rate for the C Series Scanned devices uses 10 µs of additional settling time between channels, compared to the fastest AI Convert Clock rate for the device. When the Sample Clock rate is too high to allow for 10 µs of additional settling time, the default AI Convert Clock rate uses as much settling time as is allowed by the Sample Clock rate. If there are multiple C Series Scanned devices in the same task, the same amount of additional settling time is used for all devices in the task, even if their maximum AI Convert Clock rates differ.

    With C Series Slow Sample devices, such as the NI 9211, if the sampling rate of a hardware-timed acquisition exceeds the maximum sampling rate of the module, the most recently acquired sample may be read multiple times and no warning or error is generated. Exceeding the maximum sampling rate of other devices in the same task generates warnings or errors. The first sample of a hardware-timed acquisition with C Series Slow Sample devices is sampled when the task is committed. Software-timed acquisitions with C Series Slow Sample devices always wait for a new sample to be acquired.

    The NI 9213/9214 maximum sample rate of 100 S/s applies to tasks with 13 or less analog input channels per module. To determine the maximum sample rate for an NI 9213/9214, query the AI.MaxMultiChanRate attribute/property and divide that returned value by the number of channels. For instance, if your analog input task uses 14 channels and AI.MaxMultiChanRate returns 1360.54, the maximum sample rate would be 97.18 S/s. You can also query the maximum sample rate used in the task with the SampClk.MaxRate attribute/property.

    The maximum sampling rate of the NI 9215 depends on which channel(s) you are acquiring from. For instance, a task acquiring from any combination of ai0, ai1, and ai2 can sample at faster rates than a task that includes ai3. The maximum sampling rates are attainable only when sampling from ai0. If you have multiple NI 9215 devices in the same task, they sample in parallel. For instance, multiple NI 9215 devices acquiring from ai0 may be able to achieve a faster sampling rate than a single NI 9215 acquiring from ai3.

    The C Series Delta-Sigma devices, such as the NI 9225, NI 9227, NI 9235, and NI 9239, have both a maximum and a minimum sampling rate. Refer to the specifications for your device to determine the sampling rate range.

    When you set a sampling rate for the NI 9230, NI 9232, or NI 9234, NI-DAQmx selects the highest possible decimation rate. Refer to the operating instructions for your device for more information about available sampling rates.

    When C Series Delta Sigma devices, such as the NI 9230, NI 9232, NI 9234, or NI 9251 are in a task with a C Series device that has a different sample clock timebase, NI-DAQmx always chooses the sample clock timebase with the highest frequency. To override this selection, you can set the sample clock timebase in the SampClk.Timebase.Src attribute/property.

  • Reference Clock Considerations

    Devices with a reference clock do not support on-demand timing. These devices require hardware timing from a steady clock. Using a phase-locked loop, this clock synchronizes the onboard oscillators, which serve as the sample clock timebase. When devices with reference clocks are in a task, you cannot set an external SampClk.Src or SampClkTimebase. Similar to DSA devices, devices with a reference clock do not support external sample clocks from arbitrary signal sources.

  • Hardware and On-Demand Timing for C Series Delta-Sigma Devices

    C Series Delta-Sigma devices do not support the on-demand timing type. All acquisitions and generations for C Series Delta-Sigma devices require hardware timing from a steady clock. You cannot set the SampClk.Src attribute/property to an external source when a C Series Delta-Sigma device is in the task. With C Series Delta-Sigma devices, external clocking from arbitrary external signal sources such as encoders and tachometers is not supported.

Analog Output Timing Considerations for C Series Devices

Only one hardware-timed analog output task per chassis at a given time is supported, but the number of concurrent software-timed analog output tasks is limited only by the available channels. A single C Series analog output device cannot be used for hardware-timed and software-timed tasks at the same time.

Digital Input/Output Timing Considerations for C Series Devices

Only one hardware-timed digital input task and one hardware-timed digital output task per chassis at a given time is supported, but the number of concurrent software-timed digital I/O tasks is limited only by the available lines.

Refer to Digital I/O Considerations for C Series for more information about hardware-timed digital input/output.

Configurable Timing for C Series Devices

On the NI 9207, NI 9208, NI 9209, NI 9213, NI USB-9213, NI WLS-9213, NI ENET-9213, NI 9216, NI 9217, and NI 9226 you can configure high-speed or high-resolution measurements using the AI.ADCTimingMode attribute/property. On the NI 9212, NI 9219, NI USB-9219, NI WLS-9219, and NI ENET-9219, you can also configure low-noise measurements using the AI.ADCTimingMode attribute/property.

For the NI 9207, NI 9208, NI 9209, NI 9212, NI 9213, NI USB-9213, NI WLS-9213, NI ENET-9213, NI 9216, NI 9217, NI 9219, NI WLS-9219, NI ENET-9219, and NI 9226 in NI CompactDAQ, this attribute/property is set to High Resolution by default. To increase the conversion rate, set this attribute/property to High Speed.

For the NI USB-9219, this attribute/property is set to High Resolution by default in on-demand mode, and the default value in hardware-timed mode is automatically determined based on Sample Clock Rate. To increase power line noise rejection on the NI 9212 and NI 9219, set this attribute/property to Best 60 Hz Rejection or Best 50 Hz Rejection.

Slow sample modules are able to sample just fast enough to avoid returning repeated data. If the user-specified rate is above the maximum rate, the module will enter background convert and return repeated data. Slow sample modules on the NI cDAQ-9171 and NI cDAQ-9191 chassis have a default timing mode of Automatic.

The AI.ADCTimingMode attribute/property affects both the maximum and default values for AIConv.Rate attribute/property in the DAQmx Timing property node. For instance, if the ADC timing mode corresponds to a conversion time of 200 ms, the maximum conversion rate is 5 Hz.

Counter Input Timing Considerations for C Series Devices

For the NI 9361, you can use multiple counter input devices in the same task, and NI-DAQmx automatically synchronizes them. A single NI 9361 cannot be used for hardware-timed and software-timed tasks at the same time. The NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis support up to four of the onboard chassis counters at a time.

Implicit timing is not supported on the NI 9361.

Note Note The NI 9361 is not supported in the NI cDAQ-9172 chassis.


Timing Considerations for DSA Devices

  • Supported Sampling Rates

    Unlike some other DAQmx devices, DSA devices have both a maximum and a minimum sampling rate. Refer to the specifications for your device to determine the sampling rate range.

  • Other DSA Timing Considerations

    DSA devices do not support the on-demand timing type. All DSA acquisitions and generations require hardware timing from a steady clock. The NI 4464, 4480, and 4481 are an exception. The NI 4464, 4480, and 4481 support on-demand timing type.

    DSA devices do not support external clocking from arbitrary external signal sources such as encoders and tachometers. The PFI lines on DSA devices cannot accept external clocks. You can program a DSA device to use an external clock only when it is a slave in multi-device synchronized system. Refer to Synchronizing DSA Devices for more details.

Parent topic: Timing
Related concepts
Synchronizing DSA Devices


Timing Considerations for E Series Devices

Special timing considerations when using E Series devices:

  • ai/ConvertClock

    When using the ai/ConvertClock as the source of a route, one extra convert pulse is generated than you might expect. For example, if you perform a finite acquisition of 100 samples with four channels, you see 401 convert pulses instead of 400. This extra convert pulse is necessary to set up the configuration memory in hardware and occurs as the task transitions to the committed state.

  • ao/SampleClock

    When using an external ao/SampleClock for finite generations, you need to provide one extra sample clock pulse than the number of samples in the generation for the Wait Until Done function/VI to indicate the task is complete. For example, if you want to generate 1000 samples using an external sample clock, you need to provide 1001 sample clock pulses or the Wait Until Done function/VI never indicates the task is done. All of the samples are generated, but the analog output timing engine needs one additional clock pulse to indicate the generation is complete. If you are trying to synchronize an analog output generation with another acquisition or generation by sharing a common clock, use the ao/SampleClock as the master clock or key off of the generation or acquisition providing the master clock to determine when the generation is complete.

Parent topic: Timing


Hardware-Timed Non-Buffered Sample Mode

In hardware-timed non-buffered sample mode, samples are acquired or generated continuously using hardware timing and no buffer. You enable this mode by using sample clock or change detection timing types and specifying a buffer size of 0. This mode is similar to hardware-timed single point sample mode but with slower performance and no error checking. Because there is no buffer if you use hardware-timed non-buffered sample mode, you should ensure that reads or writes execute fast enough to keep up with hardware timing.

Note Note NI USB devices and NI CompactDAQ systems do not support hardware-timed non-buffered sample mode when sample clock timing is used.
Parent topic: Timing
Related concepts
Sample Timing Types
Hardware-Timed Single Point Sample Mode


Timing Considerations with NI ELVIS II Family and M Series USB Devices

NI ELVIS II and M Series USB devices do not support hardware-timed single-point sample mode or Wait for Next Sample Clock. The oscilloscope channels on NI ELVIS II+, scopeCh0 and scopeCh1, support only finite samples mode, not hardware-timed single-point mode or continuous samples mode. The NI ELVIS II+ oscilloscope channels also only support the sample clock sample timing type.

Parent topic: Timing


Non-Buffered Change Detection

On X Series, M Series, and C Series devices, you can detect changes on digital lines or ports without using a buffer by specifying change detection timing with a buffer size of 0. To use change detection timing on port 1 or port 2 for X Series devices, you must use this non-buffered approach (i.e. specifying a buffer size of 0). On M Series devices, you can read from port 1 and port 2 using non-buffered change detection timing, but changes must be detected on port 0.

Parent topic: Timing


Timing Considerations for S Series

Parent topic: Timing

Analog Input with Pipelined ADCs

Note Note Not all S Series devices have pipelined ADCs. Refer to the specifications for your device to determine if your device contains pipelined ADCs.

Many S Series devices have pipelined ADCs with an intrinsic pipeline depth. This pipelining allows the device to sample at higher rates, but it also has other consequences on the timing requirements for the device. S Series devices, except for the NI 6143, do not support AI hardware-timed single-point sample mode. Since the data needs to travel through the pipeline before it can be read, the data being read is always pipeline-depth points old. For instance, if the pipeline depth for a device is three, the first sample is acquired on clock tick 1, but it is not available for reading until clock tick 4. Following this logic, you must supply pipeline-depth extra clock pulses for a finite acquisition to flush the pipeline. Continuing with the previous example, if the pipeline depth is three and you want to acquire 1000 samples, you need to generate 1003 sample clock pulses. If you are using the onboard sample clock, NI-DAQmx automatically generates the appropriate number of sample clock pulses. However, when using an external sample clock or when synchronizing devices, you need to ensure you supply the appropriate number of sample clock pulses.

There is also a finite amount of time a sample can be held in the pipeline before it starts to degrade and lose measurement accuracy. This time limit imposes a minimum sampling rate that must be met to achieve the measurement accuracy specified for the device. Although you can sample slower than this minimum recommend sampling rate, the accuracy specifications for the device are not guaranteed. Refer to the specifications for your device to determine the recommended minimum sampling rate.

This degradation of samples in the pipeline also affects on-demand single-point acquisitions and acquisitions that use a Pause Trigger. For on-demand single-point acquisitions, NI-DAQmx generates multiple sample clocks at the maximum sample rate of the device for each sample that is read. For S Series devices with a pipelined ADC, the number of sample clocks generated is equal to the pipeline depth plus one. For S Series devices that do not have a pipelined ADC, two sample clock pulses are generated for each point. This means that if you export the sample clock while doing an on-demand single-point acquisition, you get more sample clock pulses than data points. NI-DAQmx then throws away all points except the data point that corresponds to the first sample clock pulse. This ensures the data returned is always valid data. For acquisitions that use a Pause Trigger, the trigger could invalidate the samples in the pipeline if the trigger is asserted longer than the pipeline depth divided by the minimum sampling rate. For instance, if the device has a pipeline depth of three and a minimum sampling rate of 1000 samples per second, data should not sit in the pipeline for more than 3 ms. This gives up to a maximum of 3 ms for the Pause Trigger to remain asserted and three sample clocks to be detected before the data in the pipeline deteriorates past specifications. In the case of a Pause Trigger, NI-DAQmx does not detect or throw out any invalid samples. You must detect this situation and deal with any invalid samples as appropriate.

Analog Output

When using an external ao/SampleClock for finite generations, you need to provide one more sample clock pulse than the number of samples in the generation for the Wait Until Done function/VI to indicate the task is complete. For example, if you want to generate 1000 samples using an external sample clock, you need to provide 1001 sample clock pulses, or the Wait Until Done function/VI never indicates the task is done. All of the samples are generated, but the analog output timing engine needs one additional clock pulse to indicate the generation is complete. If you are trying to synchronize an analog output generation with another acquisition or generation by sharing a common clock, use the ao/SampleClock as the master clock, or key off of the generation or acquisition providing the master clock to determine when the generation is complete.

Note Note For S Series devices that use the STC2 timing chip, such as the NI 6154, you do not need to apply an extra sample clock pulse to complete the task.


Timing Considerations for SC Express Devices

Parent topic: Timing
Related concepts
Synchronizing X Series, M Series, and SC Express Devices

Sampling Rate Considerations

NI 433x devices and the NI 4340 have both a maximum and a minimum sampling rate. Refer to the specifications for your device to determine the sampling rate range.

The NI 4353 and NI 4357 use multiplexed sampling with multiple ADCs. The maximum sampling rate of a NI 4353 and NI 4357 depends on how many channels you are acquiring, and which channels you are acquiring from. Setting the AI.ADCTimingMode and AI.ADCCustomTimingMode properties/attributes also affects the maximum sampling rate.

Other Timing Considerations

NI 433x devices do not support external clocking from arbitrary external signal sources such as encoders and tachometers. You can program a NI 433x device to use an external timebase only when it is a slave in multi-device synchronized system. Refer to Synchronizing X Series, M Series, and SC Express Devices for more details.

The NI 4340 supports external clocking only in hardware-timed single-point sample mode.


Timing Considerations with Standalone NI CompactDAQ Systems

While Standalone NI CompactDAQ systems, such as the NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138 and 9139, can be programmed with and run the LabVIEW Real-Time Module, the hardware and software architecture is optimized for data logging applications rather than for real-time control applications. This means that Standalone NI CompactDAQ systems are ideal for streaming many channels to or from disk for extended periods of time, but should not be used for applications that require hard determinism. The Standalone NI CompactDAQ hardware and software architectures are not designed for deterministic operation.

Note Note
  • Standalone NI CompactDAQ systems do not support hardware-timed single-point sample mode or hardware-timed non-buffered sample mode.
  • Standalone NI CompactDAQ systems do not support DAQ events as timing sources for time loops.
Parent topic: Timing


Sample Rate Considerations

The maximum sample rate depends on several factors, including the settling time for your device, the number of channels in the task, and whether your device uses simultaneous sampling (one ADC per channel) or multiplexed sampling (one ADC for all analog input channels). To find the maximum sample rate for your device, use the Sample Clock:Maximum Sample Rate attribute/property.

Parent topic: Timing


Sample Clock-Timed Pulse Train Generation

X Series and 661x devices support buffered, sample clock-timed pulse train generation. M Series, S Series, TIO, and E Series devices do not. Refer to your device documentation for additional information on supported counter functionality.

Parent topic: Timing


Device-Specific Sampling Methods

S Series and X Series simultaneous sampling devices use simultaneous sampling. M Series, E Series, all other X Series devices use multiplexed sampling.

C Series devices in an NI CompactDAQ chassis use both simultaneous and multiplexed sampling, where all devices in the chassis share the same sample clock. Devices, such as the NI 9215, with an ADC for each analog channel use simultaneous sampling. Devices with a single ADC sample in sequence, using multiplexed sampling. An example of such a device is the NI 9205.

Each multiplexed C Series device has a separate convert clock. The convert clock timing is based on the number of channels for that device in the task, not the total number of channels in the task. You can set the convert clock rate on a per-device basis using the Active Devices and AI Convert Rate attributes/properties on the DAQmx Timing property node. The following figure depicts a ten-channel analog input task on two simultaneous sampling C Series devices and two multiplexed sampling C Series devices with different AI convert rates:

Parent topic: Timing
Related concepts
Multiplexed Versus Simultaneous Sampling


Timing Considerations for X Series Devices

X Series USB devices do not support hardware-timed single-point sample mode or Wait for Next Sample Clock.

Parent topic: Timing


Configurable ADC Timing

On some devices, you can configure high-speed, high-resolution, or low-noise measurements using the AI.ADCTimingMode attribute/property. The following devices support configurable ADC Timing.

  • NI 9207, NI 9208, NI 9212, NI 9213, NI 9217, and NI 9219
  • NI 4353 and NI 4357
Parent topic: NI-DAQmx Device Considerations
Related concepts
Configurable Timing for SC Express Devices
Timing Considerations for C Series Devices


Configurable Timing for SC Express Devices

On the NI 4353 and NI 4357, you can configure high-speed or high-resolution measurements using the AI.ADCTimingMode attribute/property. You can also configure a custom value. To configure a custom value, do the following:

  1. Set the AI.ADCTimingMode attribute/property to Custom.
  2. Specify a custom value with the AI.ADCCustomTimingMode attribute/property. A smaller value is the lowest noise option while a larger value is the highest speed option. Refer to your device documentation for additional information on custom values.
Parent topic: Configurable ADC Timing


Multiple Timing Engines

The following devices have multiple timing engines on some subsystems.

  • NI 4302, 4303, 4304, 4305, 4339, 4340, 4463, 4464, 4480, and 4481
  • NI 6533 and 6534
  • NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT
Parent topic: NI-DAQmx Device Considerations
Related concepts
Timing Engines
NI 4302, 4303, 4304, 4305 Timing Engines
NI 4339, 4463, 4464 Timing Engines
NI 4340 Timing Engines
NI 4480, 4481 Timing Engines
NI 6533, 6534 Timing Engines
NI cDAQ-91xx Timing Engines


NI 4302, 4303, 4304, 4305 Timing Engines

The 4302, 4303, 4304, and 4305 have four timing engines. Each of these timing engines can have its own configuration settings for timing, triggering, and the sample mode (either buffered or hardware timed single point).

Each timing engine can use any AI channel and can control up to eight channels. Each channel can only be used once across all timing engines.

By default, NI-DAQmx automatically selects an available timing engine when reserving the task. Use the DAQmx Timing attribute/property SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

Note Note You must reserve the task before querying the timing engine unless you explicitly specified the timing engine.

The SampTimingEngine attribute/property is an integer value corresponding to one of the four analog input timing engines available on the device:

SampTimingEngine Value | Timing Engine Used
0 | te0
1 | te1
2 | te2
3 | te3

If a task has more than eight channels, NI-DAQmx automatically uses multiple timing engines, synchronizing and sharing settings across all timing engines. All timing engines in a single task must share the same settings.

For example, if a task has 10 channels, NI-DAQmx uses two timing engines, which leaves two timing engines for other tasks. If the task has 32 channels, all four timing engines are used.

Each channel's digital filter settings can be configured independently if the channel is used in a task in buffered sample mode. For tasks using HWTSP sample mode, all channels in the task must have the same digital filter configuration.

Parent topic: Multiple Timing Engines
Related concepts
Digital AI Filtering


NI 4339, 4463, 4464 Timing Engines

The NI 4339 and 4464 provide timing engines for analog input. The NI 4463 provides timing engines for analog output. Multiple timing engines allow those devices to run up to two tasks simultaneously, each using independent timing and triggering configurations.

By default, NI-DAQmx automatically selects an available timing engine when reserving the task. Use the DAQmx Timing attribute/property SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

Note Note You must reserve the task before querying the timing engine unless you explicitly specified the timing engine.

The SampTimingEngine attribute/property is an integer value corresponding to one of the two analog input timing or analog output engines available on the device:

SampTimingEngine Value | Timing Engine Used
0 | te0
1 | te1

On the NI 4339, 4463, and 4464, the Sample Clock and Sample Clock Timebase, as well as the Start and Reference triggers, exist on each timing engine. Therefore, the names of the output terminals for those signals include the associated timing engine. If NI-DAQmx automatically selects the timing engine for a task, the timing engine, thus the output terminals for those signals, are undefined until you reserve the task. To reference one of those terminals, such as to share a Start Trigger across multiple tasks, use the Terminal attribute/property associated with each signal to determine the terminal name.

Note Note You must reserve the task before querying the terminal name unless you explicitly specify the timing engine.
Parent topic: Multiple Timing Engines
Related concepts
Timing Engines
Reserved State
Syntax for Terminal Names
Terminals


NI 4340 Timing Engines

The 4340 has four timing engines. Each of these timing engines can have its own configuration settings for timing, triggering, and the sample mode (either buffered or hardware timed single point).

Each timing engine can use any AI channel and can control up to four channels. Each channel can only be used once across all timing engines.

By default, NI-DAQmx automatically selects an available timing engine when reserving the task. Use the DAQmx Timing attribute/property SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

Note Note You must reserve the task before querying the timing engine unless you explicitly specified the timing engine.

The SampTimingEngine attribute/property is an integer value corresponding to one of the four analog input timing engines available on the device:

SampTimingEngine Value | Timing Engine Used
0 | te0
1 | te1
2 | te2
3 | te3
Parent topic: Multiple Timing Engines


NI 4480, 4481 Timing Engines

The NI 4480 and 4481 provide timing engines for analog input. Multiple timing engines allow those devices to run up to three tasks simultaneously, each using independent timing and triggering configurations.

By default, NI-DAQmx automatically selects an available timing engine when reserving the task. Use the DAQmx Timing attribute/property SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

Note Note You must reserve the task before querying the timing engine unless you explicitly specified the timing engine.

The SampTimingEngine attribute/property is an integer value corresponding to one of the two analog input timing or analog output engines available on the device:

SampTimingEngine Value | Timing Engine Used
0 | te0
1 | te1
2 | te2

On the NI 4480 and 4481, the Sample Clock and Sample Clock Timebase, as well as the Start and Reference triggers, exist on each timing engine. Therefore, the names of the output terminals for those signals include the associated timing engine. If NI-DAQmx automatically selects the timing engine for a task, the timing engine, thus the output terminals for those signals, are undefined until you reserve the task. To reference one of those terminals, such as to share a Start Trigger across multiple tasks, use the Terminal attribute/property associated with each signal to determine the terminal name.

Note Note You must reserve the task before querying the terminal name unless you explicitly specify the timing engine.
Parent topic: Multiple Timing Engines


NI 6533, 6534 Timing Engines

NI 6533 and 6534 devices provide two timing engines for digital I/O. Multiple timing engines allow those devices to run up to two tasks simultaneously, each using independent timing and triggering configurations. Also, each timing engine uses different lines for handshaking and burst handshaking.

By default, NI-DAQmx assigns a timing engine based on the ports used in the task. Refer to device documentation to determine which ports use which timing engine. Use the DAQmx Timing property/attribute SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

The SampTimingEngine property/attribute is an integer value corresponding to one of the two timing engines available on the device:

SampTimingEngine Value | Timing Engine Used
0 | dig0
1 | dig1

On NI 6533 and 6534 devices, the Sample Clock and Sample Clock Timebase, as well as the Start and Reference triggers, exist on each timing engine. Therefore, the names of the output terminals for those signals include the associated timing engine.

Parent topic: Multiple Timing Engines
Related concepts
Timing Engines
Handshake Timing Defaults
Burst Handshaking Timing Defaults for NI 653x Devices
Syntax for Terminal Names
Terminals


NI cDAQ-91xx Timing Engines

The NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis provide three timing engines for analog input. Multiple timing engines allow those chassis to run up to three analog input tasks simultaneously, each using independent timing and triggering configurations.

By default, NI-DAQmx automatically selects an available timing engine when reserving the task. Use the DAQmx Timing attribute/property SampTimingEngine to specify the timing engine to use or to determine which timing engine NI-DAQmx automatically selected.

Note Note You must reserve the task before querying the timing engine unless you explicitly specified the timing engine.

The SampTimingEngine attribute/property is an integer value corresponding to one of the three analog input timing engines available on the chassis:

SampTimingEngine Value | Timing Engine Used
0 | te0
1 | te1
2 | ai
On the NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT, the Sample Clock and Sample Clock Timebase, as well as the Start, Reference, and Pause triggers, exist on each timing engine. Therefore, the names of the output terminals for those signals include the associated timing engine. If NI-DAQmx automatically selects the timing engine for a task, the timing engine, thus the output terminals for those signals, are undefined until you reserve the task. To reference one of those terminals, such as to share a Start Trigger across multiple tasks, use the Terminal attribute/property associated with each signal to determine the terminal name.
Note Note You must reserve the task before querying the terminal name unless you explicitly specify the timing engine.

Counter Input Modules

The NI 9361 can also use te0 and te1.

Parent topic: Multiple Timing Engines
Related concepts
Timing Engines
Reserved State
Syntax for Terminal Names
Terminals


DSA

This section contains information specific to DSA devices.

Parent topic: NI-DAQmx Device Considerations
Related concepts
Alias Rejection (DSA, C Series, and NI 433x)
Channel Order
DSA, C Series, and the DAQmx I/O Server
Filter Delay Removal
Filter Delay (DSA, C Series, and NI 433x)
Gain for DSA Devices
Hardware Data Compression (DSA and NI 433x)
Integrated Electronic Piezoelectric Excitation (IEPE)
Input Coupling
Overload Detection


Alias Rejection (DSA, C Series, and NI 433x)

DSA devices, C Series Delta-Sigma devices, and NI 433x devices employ a class of ADCs and DACs known as delta-sigma converters. Delta-sigma ADCs include built-in digital filters to provide alias protection from out-of-band signal components. The digital filters always impart a delay of several samples between the time when a given analog voltage level becomes present at the ADC input and when the converter returns the corresponding digitized value. The length of this delay is always deterministic for a particular device running at a given sampling rate.

Likewise, interpolators and delta-sigma DACs provide digital filtering on analog output signals to eliminate out-of-band imaging and quantization noise. As with analog input, the digital output filtering results in a deterministic delay through the DAC.

You can safely ignore the effects of the digital filter delay for most input-only or output-only applications. The filter delay can become significant for applications requiring input and output synchronization such as stimulus-response testing and tight loop control. For DSA and C Series devices, if your application employs external digital triggering, the acquisition returns data that occurred in time before the trigger event. The number of samples preceding the trigger matches the ADC filter delay. Refer to your device documentation for more details on the ADC and DAC digital filter delays.

Parent topic: DSA


Alias Rejection at Low Sample Rates (DSA, C Series, and NI 4330/1)

At very low sample rates, the anti-aliasing filters for AI channels on DSA devices, C Series Delta-Sigma devices, NI 4330, and NI 4331 devices may not completely reject all out-of-band signals. This is primarily due to the internal digital filter of the delta-sigma ADC, which cannot suppress signals with frequencies near the multiples of the oversample rate (sampling rate multiplied by oversample factor). These devices also employ fixed cutoff analog lowpass anti-aliasing filters, but at low sample rates, some multiples of the oversample rate can fall below the cutoff frequency of the analog anti-aliasing filter.

For example, for a device using ADCs with an oversample factor of 128X and sampling at a rate of 1 kS/s, the oversample rate is 128 kHz. Some multiples of that oversample rate fall below the cutoff of the analog anti-aliasing filter. If the signal to be digitized contains energy near these frequencies, aliasing can result.

One way to prevent aliasing is to raise the sample rate so that the first 128X multiple of the sample rate falls above the cutoff of the analog anti-aliasing filter. For example, a sample rate of 25.6 kS/s is not subject to aliasing because the first 128X multiple (3.2 MHz) is well above the cutoff frequency of the analog anti-aliasing filter. Some DSA devices support enhanced alias rejection, which automatically handles alias rejection at low sample rates. Refer to the device documentation for the specifics of your device.

Parent topic: Alias Rejection (DSA, C Series, and NI 433x)
Related concepts
C Series Device Groupings
Enhanced Alias Rejection
Alias Rejection at Low Sample Rates (DSA, C Series, and NI 4330/1)


Enhanced Alias Rejection

To avoid aliasing at low sample rates, some DSA devices support enhanced alias rejection. With enhanced alias rejection enabled, the device clocks the ADCs at a multiple of the user-specified sample rate. This results in an improvement in low-frequency alias rejection. With enhanced alias rejection enabled, you do not need to scale the desired sample rate, and you do not need to programmatically decimate data the device returns.

Enhanced alias rejection is controlled with the AI.EnhancedAliasRejectionEnable attribute/property. Enhanced alias rejection is enabled by default on NI 4461/4462/4464 devices and disabled by default on NI 447x and NI 449x devices.

Note Note Enhanced alias rejection is always enabled on the NI 4464.
Note Note The original versions of NI 447x devices do not support Enhanced Alias Rejection. Refer to National Instruments Dynamic Signal Acquisition Help for more information.
Parent topic: Alias Rejection (DSA, C Series, and NI 433x)
Related concepts
Alias Rejection at Low Sample Rates (DSA, C Series, and NI 4330/1)

Synchronization Issues

When synchronizing multiple devices, set the AI.EnhancedAliasRejectionEnable attribute/property to the same value on all devices. If any of the synchronized devices do not support enhanced alias rejection, set AI.EnhancedAliasRejectionEnable to FALSE on all devices. When synchronizing devices from different categories, NI 4461/4462 with NI 447x for example, set AI.EnhancedAliasRejectionEnable to FALSE on all devices.


Channel Order

On DSA devices, you must list channels in a task in ascending order. For example, if your task includes ai0 and ai1, you must arrange the channel list such that ai0 precedes ai1.

This constraint applies to virtual channels as well as physical channels. For example, if you include a virtual channel for ai0 named vibration and a virtual channel for ai1 named proxProbe, vibration must precede proxProbe in the channel list.

Parent topic: DSA


DSA, C Series, and the DAQmx I/O Server

DSA devices and C Series Delta-Sigma devices do not support the DAQmx I/O Server.

Parent topic: DSA
Related concepts
C Series Delta-Sigma Devices


Filter Delay Removal

NI 4302, 4303, 4304, 4305, 433x, 4340, 4464, 4480, 4481, and 449x devices support filter delay removal, which automatically discards filter delay samples. The AI.RemoveFilterDelay attribute/property controls the filter delay removal.

On NI 449x devices, the AI.RemoveFilterDelay attribute/property is disabled by default.

On NI 4302, 4303, 4304, 4305, 433x, 4340, 4464, 4480, and 4481 devices, the AI.RemoveFilterDelay attribute/property is enabled by default. On the NI 4330/4331, filter delay removal is always enabled.

On NI 4302, 4303, 4304, 4305, 4464, 4339, 4340, 4480, and 4481 devices, you can use the AI.FilterDelayAdjustment attribute/property to further adjust which samples to discard. This adjustment is relative to the amount of filter delay in the device, which is indicated by the AI.FilterDelay attribute/property.

If you disable the AI.RemoveFilterDelay attribute/property, you must compensate for filter delay samples. Refer to your device documentation for information on how many filter delay samples to compensate for on your device.

Parent topic: DSA


Filter Delay (DSA, C Series, and NI 433x)

The delta-sigma ADCs and DACs on DSA devices, C Series Delta-Sigma devices, and NI 433x devices employ digital filtering that imparts a delay of several sample intervals. The filter delays are equal in a homogeneous system, so these delays cancel out when performing phase measurements between channels. However, the filter delays differ in a heterogeneous system. This can introduce errors in phase comparisons between channels on different devices or between channels on similar devices running at different rates. Such phase errors are always deterministic, and you can account for them in software.

Parent topic: DSA
Related concepts
C Series Device Groupings


Gain for DSA Devices

On DSA devices, each gain setting corresponds to a particular range centered on 0 V. The gain settings are specified in decibels (dB), where the 0 dB reference is the default range of ±10 V.

For analog input operations, a negative gain value implies attenuation of the signal before the ADC, increasing the range beyond ±10 V. Thus, an input gain setting of –10 dB corresponds to an input range of ±31.6 V. On analog output, a negative gain value implies attenuation following the DAC. This decreases the output range. For instance, an output gain setting of –20 dB corresponds to an output range of ±1 V.

NI-DAQmx has three separate attribute/property sets you can use to control the hardware gain setting. Each has a different priority. If you write values to two or more of these attributes/properties that correspond to different hardware gain settings, the one with the highest priority will determine the hardware behavior.

  • Gain Attributes/Properties—The gain attributes/properties AI.Gain and AO.Gain set the amount of gain to apply to the signal. These properties are set in decibels referenced to 10 V. These properties have the highest priority in NI-DAQmx.
  • Range Attributes/Properties—The range attributes/properties AI.Rng.High, AI.Rng.Low, AO.DAC.Rng.High, and AO.DAC.Rng.Low define the maximum and minimum voltages you can acquire or generate. The range attributes/properties have a lower priority than the gain attributes/properties, but a higher priority than the maximum and minimum attributes/properties.
  • Maximum and Minimum Attributes/Properties—The maximum and minimum attributes/properties AI.Max, AI.Min, AO.Max, and AO.Min specify values in engineering units that define the range. These attributes/properties have the lowest priority in NI-DAQmx. They are also the most commonly used since you can set them immediately when an NI-DAQmx task is created.
Parent topic: DSA


Hardware Data Compression (DSA and NI 433x)

If the raw data compression type is set to lossless packing and all channels in a task support hardware compression, hardware data compression is enabled by default. However, if any channels do not support hardware data compression, software data compression is selected by default.

Parent topic: DSA


Integrated Electronic Piezoelectric Excitation (IEPE)

If you attach an IEPE accelerometer or microphone to an AI channel that requires excitation from a device such as a DSA device, an NI 9230, an NI 9232, or an NI 9234, you must enable the IEPE excitation circuitry for that channel to generate the required current. IEPE signal conditioning can be independently configured on a per-channel basis.

To enable the IEPE current source on your device, use the Channel attribute/property AI.Excit.Val to specify a current in amperes. Some devices allow multiple excitation current values such as 0.004 A and 0.01 A. Other devices allow only a single value such as 0.004 A. A value of 0 A disables the IEPE excitation. Refer to the device documentation for details on your device.

Note Note
  • You cannot enable IEPE excitation on DSA devices when the terminal configuration is differential. The exception is NI 9218 which has optional IEPE excitation and supports a differential terminal configuration.
  • Changing the IEPE excitation level may cause transient voltages to appear in the signal. NI-DAQmx does not implement a delay to allow the signal to settle. Therefore, after changing the IEPE level and committing this change to the hardware with the Start function/VI or the Control Task function/VI, you might add a software delay to allow the signal to settle before proceeding with your application.

A DC offset is generated equal to the product of the excitation current and sensor impedance when IEPE signal conditioning is enabled. To remove the unwanted offset, you should enable AC coupling. Using DC coupling with IEPE excitation enabled is appropriate only if the offset does not exceed the voltage range of the channel.

Parent topic: DSA
1 Devices are listed as examples and are not intended to be a comprehensive list. Refer to the device documentation for the IEPE specifications of your device.


Input Coupling

You can configure each AI channel of your DSA device to be either AC or DC coupled, with the exception of the NI 9233, the NI 4495, the NI 4496, and the NI 4498 devices, which are AC coupled only. If you select DC coupling, any DC offset present in the source signal is passed to the ADC. The DC-coupled configuration is usually best if the signal source has only small amounts of offset voltage, less than ±100 mV, or if the DC content of the acquired signal is important.

If the source has a significant amount of unwanted DC offset (bias voltage), you should select AC coupling to take full advantage of the input dynamic range. Selecting AC coupling enables a single-pole, high-pass resistor-capacitor (RC) filter into the positive and negative signal path. Refer to your device documentation for additional information on the filter circuitry.

Use the NI-DAQmx Channel attribute/property AI.Coupling to set the input coupling mode on your DSA device.

If you create a virtual channel for acceleration or sound pressure measurements with your DSA device, the input coupling for the channel defaults to AC. For other types of virtual channels, the input coupling defaults to DC.

Note Note NI-DAQmx does not compensate for the settling time or delay introduced by the RC filter.

Using AC coupling results in a drop in the low-frequency response of the AI circuitry. The AC coupling circuitry is usually characterized by a 3 dB cut-off frequency. However, the roll off from the high-pass filter can have a measurable effect even at frequencies several times greater than the 3 dB point.

Parent topic: DSA


Overload Detection

DSA devices support overload detection in both the analog domain (pre-digitization) and digital domain (post-digitization). An analog overrange can occur independently from a digital overrange, and vice versa. For example, an IEPE accelerometer might have a resonant frequency that, when stimulated, can produce an overrange in the analog signal. However, because the delta-sigma technology of the ADC uses very sharp anti-aliasing filters, the overrange is not passed into the digitized signal. Conversely, a sharp transient on the analog side might not overrange, but the step response of the delta-sigma anti-aliasing filters might result in clipping in the digital data.

Some DSA devices support both analog and digital overload detection, while others support only digital overload detection. Consult your device documentation for more information on the overload detection capabilities for your device.

Two NI-DAQmx Read attributes/properties allow you to check for overloaded channels. The first is OverloadedChansExist. This attribute/property returns a Boolean true if one or more channels experience an overload condition. The second is OverloadedChans. This attribute/property returns an array of strings indicating which channels (if any) experienced an overload condition. You must query the OverloadedChansExist attribute/property before querying the OverloadedChans attribute/property.

OverloadedChansExist reads the overload condition from the device and caches it in the driver. It also resets the overload condition of the device after it is read. Subsequent reads of OverloadedChans attribute/property will read the overloaded channel information cached in the driver from the previous OverloadedChansExist query.

Note Note NI-DAQmx returns all data whether or not an overload occurs. If your application requires overload checking, it is recommended that you read the overload attributes/properties after each call to Read. Your program should discard questionable data or return a flag when the driver reports an overload.
Parent topic: DSA


Simultaneous Tasks

The following devices can run multiple tasks simultaneously on some subsystems.

  • NI 6533 and 6534
  • NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT
  • NI 4302, 4303, 4304, 4305, 4339, 4340, 4463, and 4464
Parent topic: NI-DAQmx Device Considerations
Related concepts
NI 4302, 4303, 4304, 4305 Simultaneous Tasks
NI 4339, 4463, and 4464 Simultaneous Tasks
NI 6533/6534 Simultaneous Tasks
NI cDAQ-91xx Simultaneous Tasks


NI 4302, 4303, 4304, 4305 Simultaneous Tasks

The 4302, 4303, 4304, and 4305 can run up to four analog input tasks simultaneously, each using independent timing and triggering configurations. Each task uses at least one of the four timing engines on the device.

Each timing engine can control up to eight channels. If a task has more than eight channels, NI-DAQmx automatically uses multiple timing engines for the task, synchronizing and sharing settings across all timing engines. For example, if a task has 10 channels, NI-DAQmx uses two timing engines for the task, which leaves two timing engines for other tasks. If the task has 32 channels, all four timing engines are used for one task.

Each bank of 8 ADCs (ai0:7, ai8:15, ai16:23, ai23:31) must all be in the same sample mode (buffered or hardware timed single point). For example, if ai0 is used in a task configured for hardware timed single point, any task using ai1:7 must also use the hardware timed single point sample mode.

Each channel's gain can be independently configured regardless of what task it's in or what sample mode it's used with.

Parent topic: Simultaneous Tasks
Related concepts
NI 4302, 4303, 4304, 4305 Timing Engines


NI 4339, 4463, and 4464 Simultaneous Tasks

NI 4339, 4463, and 4464 devices can run up to two tasks simultaneously, each using independent timing and triggering configurations. Each task uses one of the two timing engines on the device.

Parent topic: Simultaneous Tasks


NI 4340 Simultaneous Tasks

NI 4340 devices can run up to four tasks simultaneously, each using independent timing and triggering configurations. Each task uses one of the four timing engines on the device.

Parent topic: Simultaneous Tasks


NI 4480 and 4481 Simultaneous Tasks

NI 4480 and 4481 devices can run up to three tasks simultaneously, each using independent timing and triggering configurations. Each task uses one of the three timing engines on the device.

Each timing engine can be individually configured for frequency-domain mode (Sample Rate ≤ 1.25 MS/s) or time-domain mode (Sample Rate > 1.25 MS/s). For information on the differences between frequency-domain and time-domain mode refer to the NI PXIe-4480/4481 User Manual.

Parent topic: Simultaneous Tasks


NI 6533/6534 Simultaneous Tasks

NI 6533 and 6534 devices can run up to two tasks simultaneously, each using independent timing and triggering configurations. Each task uses one of the two timing engines on the device.

Parent topic: Simultaneous Tasks
Related concepts
NI 6533, 6534 Timing Engines


NI cDAQ-91xx Simultaneous Tasks

The NI cDAQ-9132, 9133, 9134, 9135, 9136, 9137, 9138, 9139, 9174, 9178, 9179, 9184, 9188, and 9188XT chassis can run up to three analog input tasks simultaneously, each using independent timing and triggering configurations. Each task uses one of the three timing engines on the chassis.

Note Note If a counter module is using one of the three timing engines on the chassis, then only two timing engines are available for cDAQ-91xx analog input tasks.
Parent topic: Simultaneous Tasks
Related concepts
NI cDAQ-91xx Timing Engines


Multidevice Tasks

Tasks can contain channels from multiple devices for these devices:
  • C Series
  • S Series
  • DSA, SC Express, and X Series
Parent topic: NI-DAQmx Device Considerations
Related concepts
C Series Multidevice Tasks
C Series Multichassis Device Tasks
S Series Multidevice Tasks
DSA, SC Express, and X Series Multidevice Tasks


C Series Multidevice Tasks

When you include channels from multiple C Series modules in a task, NI-DAQmx automatically synchronizes the modules. A task can include channels from multiple C Series modules, given the following conditions:

  • All channels in the task must be of the same I/O type. Multiple counter I/O channels are only allowed for Devices That Support Multi-Counter Tasks.
  • If the task includes channels from a mixture of C Series Delta-Sigma devices, you must account for filter delay differences between the devices.1
  • The modules must all be in the same NI CompactDAQ chassis or meet the conditions for multichassis device tasks.
Note Note
  • AI tasks containing only 16-bit or lower resolution AI modules use half the USB bandwidth of tasks with 24-bit AI modules.
  • The format of raw data returned by a C Series AI task varies depending on if any 24-bit AI modules are in the task and might not correspond to the order of the channels in the task. Scaled or unscaled data is preferable to raw data with the NI CompactDAQ chassis.
Parent topic: Multidevice Tasks
Related concepts
C Series Device Groupings
Filter Delay (DSA, C Series, and NI 433x)
Devices That Support Multi-Counter Tasks

C Series Multichassis Device Tasks

A task can include channels from multiple C Series modules in separate CompactDAQ chassis, given the following conditions:

  • The chassis are connected through a NI 9469.
  • The first channel in the channel list must be on a module in the master chassis. The master chassis is determined by the physical configuration of the chassis connections, and it should be able to output signals to the slave chassis.
  • If an Analog Input task contains Delta-Sigma modules, a channel on a Delta-Sigma module in the master chassis needs to be first on the channel list.
  • If an Analog Input task contains a device with a reference clock, a channel from a reference-clocked device needs to be first on the channel list.

Exceptions

  • The NI 9361 does not support multichassis device tasks.
  • The NI 9260 must drive the idle output to zero. If you don't, you will receive an error.
1 This delay is also known as the input delay. Refer to your device specifications for the value.


DSA, SC Express, and X Series Multidevice Tasks

A task can include channels from multiple DSA, SC Express, and X Series devices, given the following conditions. When you include channels from multiple devices in a task, NI-DAQmx automatically synchronizes the devices and enables trigger skew correction for the devices. All channels in a task must be of the same I/O type, such as analog input or analog output.

Note Note For additional device-specific DSA synchronization information, refer to the NI Dynamic Signal Acquisition User Manual, which you can find at ni.com/manuals.
Parent topic: Multidevice Tasks
Related concepts
Trigger Skew Correction
Filter Delay (DSA, C Series, and NI 433x)
Related information
ni.com/manuals

Analog Input

  • USB X Series Devices

    You cannot use USB X Series devices in multidevice tasks.

  • PCIe X Series Devices

    You must use a RTSI cable to connect the devices, and you must identify the cable in MAX.

  • PXI/PXIe Devices
    • The devices must be in a single chassis, and you must identify the chassis in MAX.
    • NI-DAQmx accounts for filter delay differences between devices with some qualifications:
      • NI 4461 and 4462 devices lack the ability to compensate for filter delay.
      • For all other devices, if the task includes channels from different device families, NI-DAQmx will account for filter delay differences between the devices.
    • The task can include channels from only one of the following groups of devices:
      • NI 4300, 4353, 4357, and PXIe X series (63xx)
      • NI 4302/4303/4304/4305, 4330/1, 4339, 4340, and 4464
      • NI 4302/4303/4304/4305, 4339, 4340, 4464, and PXIe X Series (63xx)
      • NI 4302/4303/4304/4305, 4339, 4340, 4461/4462, and 4464

You can also use the following table to check the multidevice task compatibility of any one device to another device. A checkmark in a cell indicates that the devices in the corresponding row and column can be used together in a multidevice task. For groups of more than two devices, every device must be compatible with every other device. The preceding bulleted list of groups can be used as a quick reference for groups of compatible devices that support multidevice tasks.

Table 1. PXI/PXIe Multidevice Task Compatibility
 | 4300 | 4302/4303/4304/4305 | 4330/4331 | 4339 | 4340 | 4353 | 4357 | 4461/4462 | 4464 | 4480/4481 | 449x | X Series (63xx)
4300 |  | - | - | - | - |  |  | - | - | - | - |
4302/4303/4304/4305 | - |  |  |  |  |  | - |  |  |  | - |
4330/4331 | - |  |  |  |  | - | - | - |  |  |  | -
4339 | - |  |  |  |  | - | - |  |  |  | - |
4340 | - |  |  |  |  | - | - |  |  |  | - |
4353 |  |  | - | - | - |  |  | - | - | - | - |
4357 |  | - | - | - | - |  |  | - | - | - | - |
4461/4462 | - |  | - |  |  | - | - |  |  | - |  | -
4464 | - |  |  |  |  | - | - |  |  |  | - |
4480/4481 | - |  |  |  |  | - | - | - |  |  | - | -
449x | - | - |  | - | - | - | - |  | - | - |  | -
X Series (63xx) |  |  | - |  |  |  |  | - |  | - | - |

Analog Output

  • NI PXIe-4463 devices

    The devices must be in a single chassis and the chassis must be identified in MAX. All devices in the task must be PXIe-4463s.

  • NI PXIe X Series, NI 4322, and NI 6738/6739 Devices

    The devices must be in a single chassis and the chassis must be identified in MAX.

  • NI PCIe X Series Devices

    You must use a RTSI cable to connect the devices, and you must identify the cable in MAX.

  • USB X Series Devices

    You cannot use USB X Series devices in multidevice tasks.


S Series Multidevice Tasks

A task can include channels from multiple S Series devices, given the following conditions. When you include channels from multiple S Series devices in a task, NI-DAQmx automatically synchronizes the devices.

  • All Devices

    All channels in the task must be analog input channels.

    When you include channels from different S Series devices and use an external clock setup, you must import the external clock into the device with the longest pipeline of all the devices in the task. Failing to do so results in an incomplete acquisition, with the device importing the clock not receiving enough sample clock pulses.

  • PXI Devices

    The devices must all be in a single chassis, and you must identify the chassis in MAX.

  • PCI Devices

    You must use a RTSI cable to connect the devices, and you must identify the cable in MAX.

Parent topic: Multidevice Tasks
Related concepts
Timing Considerations for S Series


Bridge Measurement Type Support

The following devices support the force, pressure, torque, and bridge (V/V) measurement types for taking measurements from bridge-based sensors:

  • NI PXIe-433x
  • NI 9218
  • NI 9219
  • NI 9235
  • NI 9236
  • NI 9237
Parent topic: NI-DAQmx Device Considerations


C Series Device Groupings

C Series devices can be grouped into scanned devices, slow sample devices, and delta-sigma devices based on acquisition behavior.
Note Note This list does not include all C Series devices.
Parent topic: NI-DAQmx Device Considerations

C Series Scanned Devices

  • NI 9201
  • NI 9203
  • NI 9205
  • NI 9206
  • NI 9207
  • NI 9208
  • NI 9209
  • NI 9210
  • NI 9211
  • NI 9213
  • NI 9214
  • NI 9216
  • NI 9217
  • NI 9221
  • NI 9226

C Series Slow Sample Devices

  • NI 9207
  • NI 9208
  • NI 9209
  • NI 9210
  • NI 9211
  • NI 9212
  • NI 9213
  • NI 9214
  • NI 9216
  • NI 9217
  • NI 9219
  • NI 9226

C Series Delta-Sigma Devices

  • NI 9218
  • NI 9225
  • NI 9227
  • NI 9229
  • NI 9230
  • NI 9232
  • NI 9233
  • NI 9234
  • NI 9235
  • NI 9236
  • NI 9237
  • NI 9238
  • NI 9239
  • NI 9242
  • NI 9244
  • NI 9246
  • NI 9247
  • NI 9251


Common-Mode Over-Range Detection

All input channels share a common ground, COM, that is isolated from other modules in the system. The device's common-mode range is the maximum voltage between any channel and COM. The NI 9213, NI 9214, and NI PXIe 4353 measures the common-mode voltage level of each channel, and its over-range status can be monitored in NI-DAQmx.

To determine if a common-mode over-range detection has occurred, use the Common Mode Range Error Channels Exist and Common Mode Range Error Channels properties within the DAQmx Read property node. Common Mode Range Error Channels Exist returns a Boolean of true if one or more channels exceed the common-mode input range since the last time the property was queried, and Common Mode Range Error Channels returns the names of the virtual channels that exceed the common-mode input range.

If a common-mode voltage out of range is detected, the accuracy of the data on any channel in the task may be impacted. If a thermocouple is connected to the device, but is not in the task, make sure the channel does not exceed the common-mode voltage range. A floating thermocouple, or a channel that is left unconnected, will not exceed the common-mode voltage range. Refer to the devices Specifications document for more information about the common-mode voltage range.

Parent topic: NI-DAQmx Device Considerations


Devices That Support Multi-Counter Tasks

The following devices have multiple counters and support adding multiple counter channels to the same task.

  • NI 9361
Parent topic: NI-DAQmx Device Considerations


Digital AI Filtering

The NI 4302, 4303, 4304, 4305, 4339, 4480, and 4481 modules have a user-configurable lowpass filter for their analog input channels. This filtering is implemented with a digital elliptical filter. It is configured independently of the tracking anti-aliasing filter. It may be helpful when measuring in an environment with excessive high frequency noise below the anti-aliasing filter's cutoff.

When sampling in hardware-timed single point mode, the filter is always enabled. You can set or query its cutoff frequency using the AI.DigFltr.Lowpass.CutoffFreq attribute/property. If your application does not require this additional filtering, leave this property set to its default value. This will configure the widest bandwidth filter possible.

Digital AI filtering for hardware-timed single point mode is supported on the following modules:

Modules | Default Cutoff Frequency | Support Cutoff Frequencies
NI PXIe-4302, 4303, 4304, 4305 | 2 kHz | 100 Hz, 200 Hz, 500 Hz, 1 kHz, 2 kHz, 3 kHz
NI PXIe-4339 | 2 kHz | 200 Hz, 500 Hz, 1 kHz, 2 kHz , 3 kHz

When using other sampling modes, the filter is optional. This filter can be enabled by using the AI.DigFltr.Enable attribute/property, and you can set or query its cutoff frequency using the AI.DigFltr.Lowpass.CutoffFreq attribute/property.

The following modules support digital AI filtering in other sampling modes:

Modules | Default Cutoff Frequency | Support Cutoff Frequencies
NI PXIe-4302, 4303, 4304, 4305 | None | 2 Hz, 20 Hz, 200 Hz, 1 kHz, 2 kHz, none
NI PXIe-4480, 4481 | 2 MHz | 2 MHz, user-defined
Note Note User-defined cutoff frequencies for the 4480 and 4481 are supported only for sample rates greater than 1.25 MHz.
Parent topic: NI-DAQmx Device Considerations


Excitation Fault Detection

Two NI-DAQmx Read attributes/properties allow you to check for excitation faults. The first is ExcitFaultChansExist. This attribute/property returns a Boolean of true if one or more channels experience an excitation fault condition. The second is ExcitFaultChans. This attribute/property returns an array of strings indicating which channels (if any) experienced an excitation fault condition. You must query the ExcitFaultChansExist attribute/property before querying the ExcitFaultChans attribute/property.

ExcitFaultChansExist reads the excitation fault condition from the device and stores it in NI-DAQmx. Subsequent reads of ExcitFaultChans will read the excitation fault channel information stored in NI-DAQmx from the previous ExcitFaultChansExist query.

NI-DAQmx returns all data regardless of whether an excitation fault happens. If your application needs excitation fault checking, you should read the excitation fault attributes/properties after each call to read. Your program should discard questionable data or return a flag when NI-DAQmx reports an excitation fault.

The NI 9218 can detect if there is an overcurrent fault between Ex+ and Ex- pins of either channel for either the strain mode case or the powered sensor measurement case. When the NI 9218 is configured for powered sensor measurement, which requires a +12 V excitation, it can also detect the absence of the required 9-30 V external power supply connected to the Vsup terminal. Both of these types of faults are reported as excitation faults.

The PXIe-4340 can detect if there is an overcurrent fault between the Ex+ and Ex- pins of any channel. This fault occurs when a voltage source is connected to the Ex+ and Ex- pins of any channel, or the load impedance is too low (excessive current). Ensure that only the primary winding of an LVDT/RVDT sensor is connected to the Ex+ and Ex- pins of any channel on this module.

Parent topic: NI-DAQmx Device Considerations


External Overvoltage Detection

An external overvoltage condition occurs when an analog output channel is connected to an external voltage source that is high enough to overdrive the analog output channel. Two NI-DAQmx Write attributes/properties allow you to check for external overvoltage channels.

The first is ExternalOvervoltageChansExist. This attribute/property returns a Boolean true if one or more channels experience an external overvoltage condition. The second is ExternalOvervoltageChans. This attribute/property returns an array of strings indicating which channels (if any) experienced an external overvoltage condition. You must query the ExternalOvervoltageChansExist attribute/property before querying the ExternalOvervoltageChans attribute/property.

ExternalOvervoltageChansExist reads the external overvoltage fault condition from the device and caches it in the driver. It also resets this condition of the device after it is read. Subsequent reads of ExternalOvervoltageChans attribute/property will read the faulted channel information cached in the driver from the previous ExternalOvervoltageChansExist query.

Note Note NI-DAQmx generates all data whether or not an external overvoltage fault occurs. If your application requires external overvoltage checking, it is recommended that you read the above attributes/properties after each call to Write. Your program should discard questionable output or return a flag when the driver reports an external overvoltage.

Consult your device documentation for more information on fault reporting thresholds and capabilities specific to your device.

Parent topic: NI-DAQmx Device Considerations


External Reference Sources

For 625x M Series devices, you can use APFI 0 or APFI 1 for analog output external reference sources. With the NI ELVIS II Family devices, APFI 0 and APFI 1 are not available as analog output external reference sources. For 628x M Series devices, you can use ao0 through ao3. On some other STC-based devices, you can use EXTREF as the analog output external reference source. Using an external voltage reference enables you to maximize the resolution of your device. If the voltages you want to generate do not exceed a certain level and you can supply an external reference voltage at that level, you achieve your device's maximum resolution. You also can use external reference voltages to apply a gain to a DC voltage or to a time-varying waveform.

Refer to the specifications for your device for additional information.

Parent topic: NI-DAQmx Device Considerations


Initialized States for Terminals and Output Channels

When you use MAX or the NI-DAQmx API to reset a device, NI-DAQmx sets terminals and output channels to an initialized state.

  • Digital I/O Lines

    NI-DAQmx sets all digital I/O lines to the configured power-up state. NI-DAQmx tristates all digital I/O lines on devices that do not support configurable power-up states. NI-DAQmx outputs 0 on all digital output-only lines on devices that do not support configurable power-up states.

  • PFI Lines

    NI-DAQmx tristates all PFI lines, unless they are also digital I/O lines. In that case, the digital I/O line behavior applies.

  • AO Channels

    On E Series, S Series, and AO Series devices, NI-DAQmx does not alter the AO channels. They continue to generate the DC voltage you last set them to.

    With static AO devices, all voltage outputs are at their user-defined values to full accuracy within 1 s of power-up device reset. Before this time, the voltage outputs can float to unspecified values.

    On DSA devices, NI-DAQmx sets all AO channels to high impedance.

    On M Series, C Series, and X Series, the AO channels are set to 0 Volts.

Parent topic: NI-DAQmx Device Considerations


Internal PLL Unlock Status

Two NI-DAQmx Read attributes/properties allow you to check if the PLL was unlocked during data acquisition for a task. The first is PLL.UnlockedChansExist. This attribute/property returns a Boolean true if one or more channel PLLs became unlocked during the previous acquisition. The second in PLL.UnlockedChans. This attribute/property returns an array of strings indicating which channel PLLs (if any) became unlocked.

PLL.UnlockedChansExist can only be used when the task is in a stop state but is still reserved. You can also explicitly commit, start, and then stop the task without explicitly uncommitting using the DAQmx Control Task VI.

Parent topic: NI-DAQmx Device Considerations


Network Address Fallback Order

When NI-DAQmx attempts to contact a Network DAQ device, it uses addresses stored previously to connect to the device on the network.

NI-DAQmx follows this sequence to contact Network DAQ devices:
  1. NI-DAQmx uses the IP address of the last network interface used by NI-DAQmx.
  2. If the first IP address fails and the device has both wired and wireless network connections, NI-DAQmx attempts to use the last known IP address of the other network interface (wired or wireless).
  3. If both known IP addresses fail, NI-DAQmx uses an address returned from a name look up of the device's hostname.
Parent topic: NI-DAQmx Device Considerations


NI USB-TC01 Considerations

If you are acquiring data from the device in a NI-DAQmx task or using the device's temperature logger, the NI USB-TC01 launch screen cannot acquire data.

In MAX, the Reset Device option is disabled for the NI USB-TC01. If you attempt to reset the device with the Reset Device VI/function, it returns an error if any task is using the device. To reset the NI USB-TC01, disconnect and reconnect the device.

Parent topic: NI-DAQmx Device Considerations


Open Current Loop Detection

Two NI-DAQmx Read/Write attributes/properties allow you to check for disconnected sensors. The first is OpenCurrentLoopChansExist. This attribute/property returns a Boolean true if one or more channels experience an open current loop condition. The second is OpenCurrentLoopChans. This attribute/property returns an array of strings indicating which channels (if any) experienced an open current loop condition. You must query the OpenCurrentLoopChansExist attribute/property before querying the OpenCurrentLoopChans attribute/property.

OpenCurrentLoopChansExist reads the open current loop condition from the device and caches it in the driver. Subsequent reads of OpenCurrentLoopChans attribute/property will read the open current loop channel information cached in the driver from the previous OpenCurrentLoopChansExist query.

Note Note
  • NI-DAQmx returns all data whether or not an open current loop occurs. If your application requires open current loop checking, it is recommended that you read the open current loop attributes/properties after each call to Read. Your program should discard questionable data or return a flag when the driver reports an open current loop.
  • IEPE must be turned on for open current loop detection to work. If IEPE is not turned on, an error is returned when OpenCurrentLoopChans is read.
Parent topic: NI-DAQmx Device Considerations


Open Thermocouple Detection (OTD)

Breaking the hot junction of a thermocouple or disconnecting a thermocouple signal results in an open thermocouple channel. This causes the channel to return invalid data. Using open thermocouple detection, you can determine if a thermocouple channel is disconnected.

Devices have a set of pull-up and bias resistor networks that connect to channels, forming a voltage divider when a thermocouple is connected and working properly. When a thermocouple breaks or becomes open, the open thermocouple detection circuitry uses a small current source to push the input voltage out of range, which is possible to detect in software using limits or conditions. In normal operation, this current causes a voltage error on the input, known as a lead offset, when pushing against a source resistance. In many applications, this error is minimal, but in some applications where high accuracy is required and there are large source resistances caused by long, narrow gauge thermocouple wires, the error can be significant.

To determine if a thermocouple is disconnected or becomes open on the NI 4353, NI 9212, NI 9213, or NI 9214, you can use the OpenThrmcplChansExist and OpenThrmcplChans attributes/properties. OpenThrmcplChansExist returns a Boolean of true if one or more channels were disconnected since the last time the attribute/property was queried, and OpenThrmcplChans returns the virtual channel names of the channels that were disconnected.

Parent topic: NI-DAQmx Device Considerations

Lead Offset Nulling

To eliminate lead offset, you can disable open thermocouple detection, which eliminates the bias current. If you are using an SCXI module, you can disable open thermocouple detection by removing the bias resistor networks. On the NI 4353 and NI 9214, you can disable OTD current with the OpenThrmcplDetectionEnable attribute/property.

If an application requires high-accuracy and high-resistance thermocouple wires, but you do not want to disable the ability to detect open thermocouples, you can perform lead offset nulling. On the NI 9214, you can calibrate lead offset nulling programmatically. Lead offset nulling calibration compensates for lead offset error by taking the difference between a measurement with the bias current from open thermocouple detection and one without the bias current. This difference is then stored in the AI.Thrmcpl.LeadOffsetVoltage attribute/property and is applied to measurements to compensate for current from open thermocouple detection.


Overcurrent Detection

Two NI-DAQmx Read/Write attributes/properties allow you to check for shorted channels. The first is OvercurrentChansExist. This attribute/property returns a Boolean true if one or more channels experience an overcurrent condition. The second is OvercurrentChans. This attribute/property returns an array of strings indicating which channels (if any) experienced an overcurrent condition. You must query the OvercurrentChansExist attribute/property before querying the OvercurrentChans attribute/property.

OvercurrentChansExist reads the overcurrent condition from the device and caches it in the driver. Subsequent reads of OvercurrentChans attribute/property will read the overcurrent channel information cached in the driver from the previous OvercurrentChansExist query.

Note Note For the NI 4610, use the AO.PowerAmp.Overcurrent attribute/property to check for shorted channels. On the NI 4610, AO.PowerAmp.Overcurrent detects the overcurrent condition for the specified channel and caches that information in the driver.

NI-DAQmx returns all data whether or not a short occurs. If your application requires overcurrent checking, it is recommended that you read the overcurrent attributes/properties after each call to Read/Write. Your program should discard questionable data or return a flag when the driver reports a short.

IEPE must be turned on for overcurrent detection to work (except for the NI 4322, NI 4610, NI 9219, and NI 9269). If IEPE is not turned on, an error is returned when OvercurrentChansExist is read.

Shorted current channels are known as short circuits. Overcurrent detection attributes/properties can be used to detect short circuits.

Parent topic: NI-DAQmx Device Considerations


Overtemperature Detection

An overtemperature condition occurs when the ambient temperature of the device exceeds a safe operating level. The device may disable any overtemperature channels until the ambient temperature returns to a safe level. Use the OvertemperatureChansExist attribute/property to determine if the device is experiencing an overtemperature condition. Devices may have front panel LEDs that will indicate an overtemperature condition has occurred.

Note Note Refer to device specific documentation for further information on meaning of LED status.
Parent topic: NI-DAQmx Device Considerations


Remote and Local Sensing

If you use a cable of significant length, you might experience reduced accuracy in your measurement due to reduced voltage from wire resistance. You can adjust for this voltage drop using either remote sense or local sense.

Remote sense uses a separate connection to quantify the voltage drop. This accounts for the length of the cable in the original connection. To use remote sense, you must connect the RS+ and RS- terminals on the device to the primary winding terminals on the sensor.

Local sense measures the voltage drop internally at the excitation terminals. This method does not require the use of additional wires, but is not as accurate as remote sense.

On the PXIe-4340, you can set each channel to use either remote sense or local sense by using the AI.Excit.Source attribute/property.

Parent topic: NI-DAQmx Device Considerations


Setting Power-Up States for M Series, NI 670x, and Software-Timed Digital I/O Devices

You can set the state of physical channels for some devices when your computer is powered on or the device is reset in NI-DAQmx. However, for all NI-DAQmx simulated devices, power-up states are not persisted.

Caution Caution Devices have limited numbers of writes to the EEPROM, so change power-up states infrequently.
Parent topic: NI-DAQmx Device Considerations

Setting Digital States for M Series, X Series and Software-Timed Digital I/O Devices

You can set the digital power-up state for M Series, X Series, and software-timed digital I/O devices to logic low, logic high, or tristate (floating) in MAX. You also can set power-up states with the Set Power Up States (Digital) function/VI, but using MAX is the recommended method. You can only specify a programmable power-up state of tristate on devices with configurable direction. Refer to your device documentation to see if your device supports configurable direction. For NI 6230/36 devices, you can also specify a power-up state of tristate for digital output. The power-up state can be specified on a port basis only. The power-up state of all other NI 623x devices can be specified by line but cannot be set to tristate.

Note Note I/O direction on software-timed digital I/O devices is port configurable only (except on the NI PCIe-6509). Therefore, you can set the power-up state to tristate only on a port-by-port basis. You can, however, set individual digital output lines in a port to logic low or logic high.

Setting Analog States for NI 4322 Devices

You can set the analog power-up state for NI 4322 devices in MAX. You also can set power-up states with the DAQmx Set Power Up States (Analog With Output Type) function/VI.

Setting Analog States for NI 670x Devices

You can set the analog power-up state for NI 670x devices in MAX. You also can set power-up states with the DAQmx Set Power Up States (Analog) function/VI, but using MAX is the recommended method.


Power Supply Fault Detection

The NI 9265 can detect if there is an insufficient external power or no external power connected to the Vsup terminal. Two NI-DAQmx Read attributes/properties allow you to check the external power. The first is PowerSupplyFaultChansExist. This attribute/property returns a Boolean true if one or more channels lack external power. The second is PowerSupplyFaultChans. This attribute/property returns an array of strings indicating which channels (if any) experienced a power supply fault. You must query the PowerSupplyFaultChansExist attribute/property before querying the PowerSupplyFaultChans attribute/property.

Parent topic: NI-DAQmx Device Considerations


Push-Pull and Open Collector Mode

The NI USB-6000 /6001/6002/6003 are programmable as either push-pull or open-collector (open-drain) mode. The default configuration is push-pull.

The NI USB-6008 has open-collector (open-drain) mode only, but each channel on the NI USB-6501, the NI USB-6009, and SensorDAQ are programmable as either push-pull or open-collector (open-drain) mode. The default configuration of the SensorDAQ, the NI USB-6008, the NI USB-6009, and the NI USB-6501 DIO ports is open-drain, allowing 5 V operation, with an onboard 4.7 k pull-up resistor. An external, user-provided, pull-up resistor can be added to increase the source current drive up to a 8.5 mA limit per line. Refer to the device documentation for more information and instructions on determining the value of the pull-up resistor.

Parent topic: NI-DAQmx Device Considerations


Querying Device Capabilities with C Series Devices

When querying DAQmx Device and DAQmx Physical Channel attributes/properties with C Series devices, the supported attributes/properties depend on the slot you plug a device into. For instance, to use the counter functionality on a C Series device in a cDAQ-9172 chassis, you must plug the C Series device into slots 5 or 6. If the device is not in one of these slots, you cannot perform counter I/O, nor can you query counter-specific device capabilities such as the counter size.

Parent topic: NI-DAQmx Device Considerations


RTSI Triggering with M Series USB and NI ELVIS II Family Devices

M Series USB and NI ELVIS II Family devices do not support RTSI triggering.

Parent topic: NI-DAQmx Device Considerations


SCC Signal Conditioning Device Considerations

The following section applies only to analog input (AI) SCC modules.

In a single stage AI SCC configuration, you connect your external signal to an SCC module which conditions the signal and passes it to the DAQ device. You can install single stage AI modules in sockets J1-J8 in the SC-2345 carrier.

Sometimes, you can cascade two AI SCC modules together on a single AI channel to form a dual-stage configuration. In this configuration, you connect the external signal to the first-stage AI module, which conditions the signal and passes it to the second-stage AI module. Then, the signal is passed to the DAQ device. First-stage of dual-stage AI modules can be located in sockets J9-J16. Second-stage of dual-stage AI modules can be located in sockets J1-J8.

An example of a dual-stage configuration is a voltage attenuator module (SCC-A10) in the first-stage SCC slot followed by a lowpass filter module (SCC-LP01) in the second-stage SCC slot to create a combined attenuator and lowpass filter signal conditioning on the specified AI channel. The following table shows all the SCC devices that support dual-stage configuration.

SCC Module | Single Stage AI (J1-J8) | First-Stage of Dual-Stage AI (J9-J16) | Second-Stage of Dual-Stage AI (J1-J8)
SCC-AI Series | Yes | Yes | No
SCC-A10 | Yes | Yes | No
SCC-RTD01 | Yes | Yes | No
SCC-CI20 | Yes | Yes | No
SCC-ACC01 | Yes | Yes | No
SCC-TC Series | Yes | Yes | No
SCC-FV01 | Yes | No | Yes
SCC-LP Series | Yes | Yes | Yes
SCC-FT01 | Yes | Yes | Yes
SCC-SG Series | Yes | Yes | No

SCC modules that are not listed in the table above do not support dual-stage configuration. This includes all analog output, digital input, and digital output SCC modules.

Parent topic: NI-DAQmx Device Considerations


Self-Powered Versus Bus-Powered M Series USB Devices

Bus-powered M Series devices require no external power source. Examples of these devices include the NI 6210, NI 6211, NI 6212, NI 6215, NI 6216, and NI 6218. Self-powered M Series devices, on the other hand, require an external power source such as a wall outlet or a battery. Self-powered devices can drive higher currents than bus-powered devices. Examples of self-powered M Series devices include the NI USB-6251 and NI USB-6259.

Parent topic: NI-DAQmx Device Considerations


Connecting Analog Voltage Input Signals for Isolated Devices

Input | Signal Source Type
Floating Signal Sources (Not Connected to Building Ground) | Ground-Referenced Signal Sources
Examples:
  • Ungrounded thermocouples
  • Signal conditioning with isolated outputs
  • Battery devices
Example:
  • Plug-in instruments with non-isolated outputs
Differential (DIFF)
Referenced Single-Ended (RSE)
Parent topic: NI-DAQmx Device Considerations
Related concepts
Terminal Configurations (Analog Input Ground Reference Settings) for Isolated Devices


SC Express Smart Accessory Connections

The following connections are supported on these SC Express accessories:

Accessory | Supported Connections | Description
CAL-4353 | _tc_calibration | Connects all TC channels to the calibration input. This connection is used to verify and adjust TC gain accuracy.
 | _cjc_calibration | Connects one CJC channel to the calibration input. This connection is used to verify and adjust CJC gain and offset accuracy.
 | _short_tc_terminals | Connects all TC channels together.
RM-4339 | _remote_sense_floating | Disconnects remote sensing for calibration.
 | _cal_channel | Connects all channels to an external calibration source.
RM-4302 | _cal_channel | Connects all channels to an external calibration source.
RM-4304 | _cal_channel | Connects all channels to an external calibration source.
Parent topic: NI-DAQmx Device Considerations


Supported Device ID Numbers

Device ID | Device Name
0x0160 | NI PCI-DIO-96
0x0162 | NI PCI-MIO-16XE-50
0x0245 | NI DAQCard-6036E
0x02C4 | NI DAQCard-6062E
0x0301 | NI SCXI-1126
0x0302 | NI SCXI-1121
0x0303 | NI SCXI-1129
0x0304 | NI SCXI-1120
0x0306 | NI SCXI-1100
0x0308 | NI SCXI-1140
0x030A | NI SCXI-1122
0x030C | NI SCXI-1160
0x030D | NI SCXI-1125
0x030E | NI SCXI-1161
0x0310 | NI SCXI-1162
0x0312 | NI SCXI-1163
0x0314 | NI SCXI-1124
0x0318 | NI SCXI-1162HV
0x031C | NI SCXI-1163R
0x031E | NI SCXI-1102
0x031F | NI SCXI-1102B
0x0320 | NI SCXI-1141
0x0321 | NI SCXI-1112
0x0322 | NI SCXI-1191
0x0323 | NI SCXI-1190
0x0324 | NI SCXI-1192
0x0329 | NI SCXI-1600
0x032D | NI SCXI-1104
0x032F | NI SCXI-1104C
0x0330 | NI SCXI-1531
0x0331 | NI SCXI-1540
0x0332 | NI SCXI-1530
0x033E | NI SCXI-1102C
0x0340 | NI SCXI-1143
0x0344 | NI SCXI-1120D
0x0345 | NI SCXI-1127
0x0346 | NI SCXI-1128
0x0360 | NI SCXI-1142
0x038F | NI SCXI-1500
0x0407 | NI SCXI-1520
0x048B | NI SCXI-1581
0x04AC | NI SCC-A10
0x04AD | NI SCC-CI20
0x04AE | NI SCC-FT01
0x04B2 | NI SCC-TC01
0x04B3 | NI SCC-TC02
0x04B4 | NI SCC-FV01
0x04B6 | NI SCC-DI01
0x04B7 | NI SCC-DO01
0x04B8 | NI SCC-LP01
0x04B9 | NI SCC-LP02
0x04BA | NI SCC-LP03
0x04BC | NI SCC-LP04
0x04BD | NI SCC-RTD01
0x04BE | NI SCC-SG01
0x04BF | NI SCC-CO20
0x04DA | NI SCC-AI01
0x04DB | NI SCC-AI02
0x04DC | NI SCC-AI03
0x04DD | NI SCC-AI04
0x04DE | NI SCC-AI05
0x04DF | NI SCC-AI06
0x04E0 | NI SCC-AI07
0x04E1 | NI SCC-AI13
0x04E2 | NI SCC-AI14
0x04E3 | NI SCC-SG02
0x04E4 | NI SCC-SG03
0x04E5 | NI SCC-SG04
0x04E6 | NI SCC-SG11
0x04EA | NI SCC-ACC01
0x04F0 | NI SCC-RLY01
0x04F6 | NI SCC-AO10
0x075C | NI DAQCard-DIO-24
0x075E | NI DAQCard-6024E
0x075F | NI DAQCard-6715
0x1150 | NI PCI-DIO-32HS
0x1170 | NI PCI-MIO-16XE-10
0x1180 | NI PCI-MIO-16E-1
0x1190 | NI PCI-MIO-16E-4
0x11B0 | NI PXI-6070E
0x11C0 | NI PXI-6040E
0x11D0 | NI PXI-6030E
0x1270 | NI PCI-6032E
0x1290 | NI PCI-6704
0x12B0 | NI PCI-6534
0x1310 | NI PCI-6602
0x1320 | NI PXI-6533
0x1330 | NI PCI-6031E
0x1340 | NI PCI-6033E
0x1350 | NI PCI-6071E
0x1360 | NI PXI-6602
0x13C0 | NI PXI-6508
0x1490 | NI PXI-6534
0x14E0 | NI PCI-6110
0x14F0 | NI PCI-6111
0x1580 | NI PXI-6031E
0x15B0 | NI PXI-6071E
0x1710 | NI PXI-6509
0x17D0 | NI PCI-6503
0x1870 | NI PCI-6713
0x1880 | NI PCI-6711
0x18B0 | NI PCI-6052E
0x18C0 | NI PXI-6052E
0x1920 | NI PXI-6704
0x1930 | NI 6040E
0x1AD0 | NI PCI-6133
0x1AE0 | NI PXI-6133
0x1E30 | NI PCI-6624
0x1E40 | NI PXI-6624
0x2410 | NI PCI-6733
0x2420 | NI PXI-6733
0x2430 | NI PCI-6731
0x24B0 | NI PXI-4200
0x24F0 | NI PXI-4472
0x2510 | NI PCI-4472
0x2520 | NI PCI-4474
0x27A0 | NI PCI-6123
0x27B0 | NI PXI-6123
0x2890 | NI PCI-6036E
0x28B0 | NI PCI-6013
0x28C0 | NI PCI-6014
0x2A60 | NI PCI-6023E
0x2A70 | NI PCI-6024E
0x2A80 | NI PCI-6025E
0x2AB0 | NI PXI-6025E
0x2B10 | NI PXI-6527
0x2B20 | NI PCI-6527
0x2B80 | NI PXI-6713
0x2B90 | NI PXI-6711
0x2C60 | NI PCI-6601
0x2C80 | NI PCI-6035E
0x2C90 | NI PCI-6703
0x2CA0 | NI PCI-6034E
0x2CC0 | NI PXI-6608
0x2EC0 | NI PXI-6115
0x2ED0 | NI PCI-6115
0x2EE0 | NI PXI-6120
0x2EF0 | NI PCI-6120
0x7023 | NI PXI-2593
0x7024 | NI SCXI-1193
0x703D | NI SCXI-1166
0x703E | NI SCXI-1167
0x703F | NI PXI-2566
0x7040 | NI PXI-2567
0x704B | NI SCXI-1130
0x704C | NI PXI-2530
0x704F | NI PXI-4220
0x7050 | NI PXI-4204
0x7067 | NI PXI-2529
0x7073 | NI PCI-6723
0x707E | NI PXI-4462
0x7085 | NI PCI-6509
0x7086 | NI PXI-6528
0x7087 | NI PCI-6515
0x7088 | NI PCI-6514
0x708C | NI PXI-2568
0x708D | NI PXI-2569
0x7090 | NI SCXI-1169
0x7099 | NI SCC-SG24
0x709F | NI USB-9421
0x709F738E | NI WLS-9421
0x709F738F | NI ENET-9421
0x70A1 | NI USB-9472
0x70A1738E | NI WLS-9472
0x70A1738F | NI ENET-9472
0x70A2 | NI USB-9481
0x70A2738E | NI WLS-9481
0x70A2738F | NI ENET-9481
0x70A3738E | NI WLS-9211
0x70A3738F | NI ENET-9211
0x70A4 | NI USB-9201
0x70A5 | NI USB-9221
0x70A6738E | NI WLS-9215
0x70A6738F | NI ENET-9215
0x70A7 | NI USB-9263
0x70A8 | NI USB-9233
0x70A9 | NI PCI-6528
0x70AA | NI PCI-6229
0x70AB | NI PCI-6259
0x70AC | NI PCI-6289
0x70AD | NI PXI-6251
0x70AE | NI PXI-6220
0x70AF | NI PCI-6221
0x70B0 | NI PCI-6220
0x70B1 | NI PXI-6229
0x70B2 | NI PXI-6259
0x70B3 | NI PXI-6289
0x70B4 | NI PCI-6250
0x70B5 | NI PXI-6221
0x70B6 | NI PCI-6280
0x70B7 | NI PCI-6254
0x70B8 | NI PCI-6251
0x70B9 | NI PXI-6250
0x70BA | NI PXI-6254
0x70BB | NI PXI-6280
0x70BC | NI PCI-6284
0x70BD | NI PCI-6281
0x70BE | NI PXI-6284
0x70BF | NI PXI-6281
0x70C0 | NI PCI-6143
0x70C3 | NI PCI-6511
0x70C8 | NI PCI-6513
0x70C9 | NI PXI-6515
0x70CC | NI PCI-6512
0x70CD | NI PXI-6514
0x70D0 | NI PXI-2570
0x70D1 | NI PXI-6513
0x70D2 | NI PXI-6512
0x70D3 | NI PXI-6511
0x70D4 | NI PCI-6722
0x70E1 | NI PXI-2532
0x70F2 | NI PCI-6224
0x70F3 | NI PXI-6224
0x70FA | NI DAQPad-6015
0x70FB | NI DAQPad-6016
0x70FF | NI PXI-6723
0x7100 | NI PXI-6722
0x7103 | NI SCXI-1521
0x710D | NI PXI-6143
0x7124 | NI PCI-6510
0x7125 | NI PCI-6516
0x7126 | NI PCI-6517
0x7127 | NI PCI-6518
0x7128 | NI PCI-6519
0x712A738E | NI WLS-9205 (DSUB)
0x712A738F | NI ENET-9205 (DSUB)
0x712C | NI USB-9265
0x712E | NI USB-9421 (DSUB)
0x712E738E | NI WLS-9421 (DSUB)
0x712E738F | NI ENET-9421 (DSUB)
0x7132 | NI USB-9472 (DSUB)
0x7132738E | NI WLS-9472 (DSUB)
0x7132738F | NI ENET-9472 (DSUB)
0x7135738E | NI WLS-9215 (BNC)
0x7135738F | NI ENET-9215 (BNC)
0x7137 | NI PXI-2575
0x713C | NI PXI-2585
0x713D | NI PXI-2586
0x713F | NI SCXI-1175
0x7142 | NI PXI-4224
0x7143 | NI SCXI-1521B
0x7146 | NI PCI-6132
0x7147 | NI PXI-6132
0x7148 | NI PCI-6122
0x7149 | NI PXI-6122
0x7150 | NI PXI-2564
0x715E | NI cDAQ-9172
0x715F | NI 9221
0x7160 | NI 9421
0x7161 | NI 9421 (DSUB)
0x7162 | NI 9472
0x7163 | NI 9472 (DSUB)
0x7164 | NI 9481
0x7165 | NI 9401
0x716B | NI PCI-6230
0x716C | NI PCI-6225
0x716D | NI PXI-6225
0x716F | NI PCI-4461
0x7170 | NI PCI-4462
0x7171 | NI PCI-6010
0x7172 | NI DAQPad-6015 (Mass Termination)
0x7173 | NI DAQPad-6015 (BNC)
0x7177 | NI PXI-6230
0x717A | NI USB-6008
0x717B | NI USB-6009
0x717D | NI PCIe-6251
0x717F | NI PCIe-6259
0x718A | NI USB-6501
0x718B | NI PCI-6521
0x718C | NI PXI-6521
0x7191 | NI PCI-6154
0x71A1 | NI USB-9201 (DSUB)
0x71A2 | NI USB-9221 (DSUB)
0x71A5 | NI PXI-2594
0x71A6 | NI SCXI-1194
0x71A7 | NI PXI-2595
0x71A8 | NI SCXI-1195
0x71A9 | NI PXI-2596
0x71AA | NI PXI-2597
0x71AB | NI PXI-2598
0x71AC | NI PXI-2599
0x71B0 | NI 9211
0x71B1 | NI 9215
0x71B2 | NI 9215 (BNC)
0x71B3 | NI 9205 (DSUB)
0x71B4 | NI 9263
0x71BB | NI PXI-2584
0x71BC | NI PCI-6221 (37-pin)
0x71C2 | NI USB-9239
0x71C3 | NI USB-9237
0x71C3738E | NI WLS-9237
0x71C3738F | NI ENET-9237
0x71C5 | NI PCI-6520
0x71C6 | NI PXI-2576
0x71D9 | NI USB-9211A
0x71DA | NI USB-9215A
0x71DB | NI USB-9215A (BNC)
0x71DF | NI USB-6525
0x71E0 | NI PCI-6255
0x71E1 | NI PXI-6255
0x71E7 | NI 9233
0x71E8 | NI SCXI-1502
0x71EA738E | NI WLS-9205
0x71EA738F | NI ENET-9205
0x71EB738E | NI WLS-9206
0x71EB738F | NI ENET-9206
0x7209 | NI PCI-6233
0x720A | NI PXI-6233
0x720B | NI PCI-6238
0x720C | NI PXI-6238
0x7252 | NI USB-6251
0x7253 | NI USB-6259
0x7263 | NI 9234
0x7264 | NI 9206
0x7265 | NI 9205
0x726A | NI SCXI-1503
0x726E | NI SCC-CTR01
0x726F | NI USB-6210
0x7270 | NI USB-6211
0x7271 | NI USB-6215
0x7272 | NI USB-6218
0x7279 | NI PCI-6232
0x727A | NI PXI-6232
0x727B | NI PCI-6239
0x727C | NI PXI-6239
0x7281 | NI PCI-6236
0x7282 | NI PXI-6236
0x7283 | NI PXI-2554
0x7285 | NI 9237
0x72A0 | NI USB-6251 (Mass Termination)
0x72A1 | NI USB-6259 (Mass Termination)
0x72B5 | NI USB-9234
0x72B5738E | NI WLS-9234
0x72B5738F | NI ENET-9234
0x72B9 | NI 9411
0x72BA | NI 9422
0x72BB | NI 9423
0x72BC | NI 9435
0x72BD | NI 9474
0x72BE | NI 9485
0x72BF | NI 9403
0x72C0 | NI 9425
0x72C1 | NI 9476
0x72C2 | NI 9477
0x72C3 | NI 9264
0x72C4 | NI 9265
0x72C5 | NI 9201
0x72C6 | NI 9201 (DSUB)
0x72C7 | NI 9221 (DSUB)
0x72C8 | NI 9203
0x72C9 | NI 9217
0x72CA | NI 9219
0x72CB | NI 9239
0x72CC | NI SensorDAQ
0x72D0 | NI PXI-2545
0x72D1 | NI PXI-2546
0x72D2 | NI PXI-2547
0x72D3 | NI PXI-2548
0x72D4 | NI PXI-2549
0x72D5 | NI PXI-2555
0x72D6 | NI PXI-2556
0x72D7 | NI PXI-2557
0x72D8 | NI PXI-2558
0x72D9 | NI PXI-2559
0x72DC | NI USB-6221
0x72DE | NI USB-6229
0x72E8 | NI PXIe-6251
0x72E9 | NI PXIe-6259
0x72EF | NI PXI-4498
0x72F0 | NI PXI-4496
0x72F3 | NI USB-6005 VSA
0x72F6 | NI USB-9264
0x72FA | NI 9229
0x72FD | NI USB-9229
0x72FF | NI USB-6509
0x730C | NI USB-9219
0x730C738E | NI WLS-9219
0x730C738F | NI ENET-9219
0x731C | NI PXI-2535
0x731D | NI PXI-2536
0x7322 | NI PXIe-6124
0x7326C4C4 | NI PCIe-6509
0x7327 | NI PXI-6529
0x732D | NI USB-6255
0x732E | NI USB-6255 (Mass Termination)
0x732F | NI USB-6225
0x7330 | NI USB-6225 (Mass Termination)
0x7335 | NI PXI-2533
0x7336 | NI PXI-2534
0x7337 | NI 9402
0x7338 | NI 9375
0x7339 | NI USB-6212
0x733B | NI USB-6216
0x733F | NI USB-6281
0x7340 | NI USB-6281 (Mass Termination)
0x7342 | NI PXI-4461
0x7343 | NI USB-6289
0x7344 | NI USB-6289 (Mass Termination)
0x7345 | NI USB-6221 (BNC)
0x7346 | NI USB-6229 (BNC)
0x7347 | NI USB-6251 (BNC)
0x7348 | NI USB-6259 (BNC)
0x7359 | NI PXI-4495
0x7367 | NI USB-9239 (BNC)
0x7368 | NI USB-9229 (BNC)
0x7369 | NI USB-9263 (BNC)
0x737A | NI 9229 (BNC)
0x737B | NI 9239 (BNC)
0x737C | NI 9263 (BNC)
0x7381 | NI 9235
0x7382 | NI 9236
0x7388 | NI 9225
0x7389 | NI USB-6212 (Mass Termination)
0x738A | NI USB-6216 (Mass Termination)
0x73A1 | NI PXIe-4498
0x73A2 | NI PXIe-4496
0x73A6 | NI ELVIS II
0x73C5 | NI PXIe-2527
0x73C6 | NI PXIe-2529
0x73C9 | NI PXIe-2532
0x73CA | NI PXIe-2569
0x73CB | NI PXIe-2575
0x73CC | NI PXIe-2593
0x73D1 | NI USB-4432
0x73E2 | NI 9213
0x73E3 | NI 9426
0x73E4 | NI 9475
0x73E5 | NI 9478
0x73E6 | NI 9237 (DSUB)
0x73E7 | NI ELVIS II+
0x73F4 | NI PXI-2515
0x73FC | NI USB-6212 (BNC)
0x73FD | NI USB-6216 (BNC)
0x73FE | NI USB-6218 (BNC)
0x7420 | NI 9227
0x7425C4C4 | NI PCIe-6320
0x7427C4C4 | NI PCIe-6321
0x7429C4C4 | NI PCIe-6323
0x742AC4C4 | NI PXIe-6341
0x742BC4C4 | NI PCIe-6341
0x742DC4C4 | NI PCIe-6343
0x742FC4C4 | NI PCIe-6351
0x7431C4C4 | NI PCIe-6353
0x7432C4C4 | NI PXIe-6361
0x7433C4C4 | NI PCIe-6361
0x7434C4C4 | NI PXIe-6363
0x7435C4C4 | NI PCIe-6363
0x7436C4C4 | NI PXIe-6356
0x7437C4C4 | NI PXIe-6358
0x7438C4C4 | NI PXIe-6366
0x7439C4C4 | NI PXIe-6368
0x7448 | NI PXI-2510
0x7449 | NI USB-9213
0x7449738E | NI WLS-9213
0x7449738F | NI ENET-9213
0x744F | NI USB-4431
0x7454 | NI PXI-2512
0x7455 | NI PXI-2514
0x7456 | NI PXIe-2512
0x7457 | NI PXIe-2514
0x745C | NI USB-9264 (DSUB)
0x7492C4C4 | NI PXIe-4300
0x7493 | NI cDAQ-9188
0x7494 | NI 9264 (DSUB)
0x74A4 | NI cDAQ-9178
0x74A5 | NI cDAQ-9174
0x74A8C4C4 | NI PXIe-4330
0x74A9C4C4 | NI PXIe-4331
0x74AE | NI PXIe-2515
0x74B2C4C4 | NI PXIe-4353
0x74B4 | NI PXI-2531
0x74B5 | NI PXIe-2531
0x74B7 | NI USB-TC01
0x74DF | NI 9207 (DSUB)
0x74E0 | NI 9208 (DSUB)
0x74E6 | NI 9269
0x74F7 | NI USB-6343
0x74F8 | NI USB-6341
0x74FA | NI USB-6351
0x74FB | NI USB-6353
0x74FD | NI USB-6361
0x74FE | NI USB-6363
0x7510 | NI 2810
0x7511 | NI 2811
0x7512 | NI 2815
0x7513 | NI 2816
0x7528 | NI PXIe-4497
0x7529 | NI PXIe-4499
0x752A | NI PXIe-4492
0x752B | NI 9214
0x7530 | NI 9222
0x7531 | NI 9223
0x7559 | NI 9232
0x755B | NI myDAQ
0x755F | NI cDAQ-9181
0x7560 | NI cDAQ-9191
0x7561 | NI USB-6356 (32 MS)
0x7563 | NI USB-6356 (64 MS)
0x7567 | NI USB-6366 (32 MS)
0x7569 | NI USB-6366 (64 MS)
0x7578 | NI 9375 (DSUB)
0x757B | NI 2812
0x757E | NI 2813
0x7581 | NI 2814
0x7584 | NI 2817
0x7587 | NI 2833
0x758A | NI 2834
0x7598 | NI PXI-2571
0x759D | NI USB-6361 (Mass Termination)
0x759E | NI USB-6363 (Mass Termination)
0x75A1 | NI USB-6366 (64 MS) (Mass Termination)
0x75BA | NI PXI-2543
0x75BB | NI PXIe-2543
0x75CFC4C4 | NI PXIe-4357
0x75DA | NI USB-6341 (BNC)
0x75DB | NI USB-6343 (BNC)
0x75DC | NI USB-6361 (BNC)
0x75DD | NI USB-6363 (BNC)
0x75DE | NI USB-6356 (32 MS) (BNC)
0x75DF | NI USB-6366 (64 MS) (BNC)
0x75EB | NI 9469
0x75F0 | NI cDAQ-9171
0x7606 | NI 9220
0x7614 | NI cDAQ-9138
0x7616 | NI 9220 (DSUB)
0x7617 | NI cDAQ-9184
0x761F | NI PXI-2540
0x7620 | NI PXIe-2540
0x7621 | NI PXI-2541
0x7622 | NI PXIe-2541
0x7628 | NI cDAQ-9139
0x7638 | NI PXI-2720
0x7639 | NI PXI-2722
0x763A | NI PXIe-2725
0x763B | NI PXIe-2727
0x764B | NI PXIe-2790
0x764C | NI PXI-2520
0x764D | NI PXI-2521
0x764E | NI PXI-2522
0x764F | NI PXI-2523
0x7654 | NI PXI-2796
0x7655 | NI PXI-2797
0x7656 | NI PXI-2798
0x7657 | NI PXI-2799
0x765D | NI PXI-2542
0x765E | NI PXIe-2542
0x765F | NI PXI-2544
0x7660 | NI PXIe-2544
0x76ABC4C4 | NI PXIe-4322
0x76AF | NI USB-6000
0x76BF | NI USB-6001
0x76C4 | NI USB-6002
0x76C6 | NI USB-6003
0x76C8C4C4 | NI PXIe-6614
0x76C9C4C4 | NI PXIe-6612
0x76DCC4C4 | NI PXIe-4610
0x76E3 | NI USB-9482
0x76E7 | NI cDAQ-9188XT
0x76F5 | NI 9482
0x770B | NI 2865
0x770F | NI 9244
0x7711C4C4 | NI PXIe-4464
0x7712C4C4 | NI PXIe-4463
0x7716C4C4 | NI PCIe-6612
0x771EC4C4 | NI PXIe-4339
0x7739 | NI cDAQ-9132
0x773A | NI cDAQ-9134
0x773C | NI 9222 (BNC)
0x773D | NI 9223 (BNC)
0x7749 | NI 9242
0x7751 | NI 9238
0x7779 | NI 9218 (DSUB)
0x777A | NI 9218
0x777F | NI 9361
0x778D | NI 9437
0x77A5C4C4 | NI PXIe-6345
0x77A6C4C4 | NI PXIe-6355
0x77A7C4C4 | NI PXIe-6365
0x77A8C4C4 | NI PXIe-6375
0x77AB | NI 9212
0x77BE | NI cDAQ-9133
0x77BF | NI cDAQ-9135
0x77CAC4C4 | NI PXIe-6738
0x77CBC4C4 | NI PXIe-6739
0x77CE | NI 9230
0x77CF | NI 9260 (BNC)
0x77D0 | NI 9260 (Mini XLR)
0x77D8 | NI 9216
0x77D9 | NI 9226
0x77E6 | NI 9344
0x77E7 | NI 9247
0x77EB | NI 9251 (Mini XLR)
0x77F1 | NI 9209 (DSUB)
0x77F4 | NI cDAQ-9179
0x77F6 | NI 9246
0x77F9 | NI 9216 (DSUB)
0x77FA | NI 9226 (DSUB)
0x7802C4C4 | NI PXIe-4302
0x7803C4C4 | NI PXIe-4303
0x7805C4C4 | NI PXIe-4305
0x7829C4C4 | NI PXIe-4340
0x7834 | NI cDAQ-9136
0x7836 | NI cDAQ-9137
0x7844 | NI PXIe-4480
0x7845 | NI PXIe-4481
0x7868 | NI 9232 (BNC)
0x7869 | NI 9230 (BNC)
0x786D | NI 9436
0x7870 | NI Simulated DAQ Device
0x7882C4C4 | NI PXIe-6376
0x7883C4C4 | NI PXIe-6378
0x788EC4C4 | NI PXIe-4304
0x78B2 | NI 9210
0x9020 | NI PXI-2501
0x9030 | NI PXI-2503
0x9040 | NI PXI-2527
0x9050 | NI PXI-2565
0x9060 | NI PXI-2590
0x9070 | NI PXI-2591
Parent topic: NI-DAQmx Device Considerations


Taking Custom Voltage Measurements with the PXIe-4339

The PXIe-4339 supports taking regular (non-ratiometric) voltage measurements using an AI Voltage task. In addition, as of NI-DAQmx 14.5, the PXIe-4339 can perform custom voltage measurements while providing voltage excitation, for example, when using DC powered sensors that return a non-ratiometric voltage. To enable this type of measurement, configure the DAQmx Create Virtual Channel VI to AI Custom Voltage with Excitation mode.

Setting the use excitation for scaling input to False will prevent the PXIe-4339's ADCs from scaling the measured voltage ratiometrically to the excitation voltage.

Setting the use excitation for scaling input to True, will enable the PXIe-4339 to use the excitation value that the user sets with the DAQmx driver for scaling the ratiometric input. The device will not use the voltage present on the remote sense lines for scaling as it does when providing internal excitation. Thus, while the driver will support using external excitation for ratiometric measurements, this is not a recommended configuration.

The table below covers each possible combination of AI channel type, voltage excitation source input value, and use excitation for scaling input value. The cases highlighted will throw DAQmx errors, and the reasons for the errors are described in the Use Case and Notes column of the table.

Note Note An RM-4339 is required to select external excitation.
Parent topic: NI-DAQmx Device Considerations
Related reference
Using the RM-4339 with the NI PXIe-4339


Using the RM-4339 with the NI PXIe-4339

This section contains information on using the NI RM-4339 with the NI PXIe-4339. Refer to SC Express Smart Accessory Connections for specific terminal connections.

Excitation

The RM-4339 has a connection for an external excitation source. Each channel can also use it's own channel-specific internal excitation. Use the AI.Excit.Src attribute/property to set the excitation connection.

Quarter-Bridge Completion

The RM-4339 includes three internal resistors you can use for quarter-bridge completion. These resistors are 120 Ω, 350 Ω, and 1 kΩ. Use the AI.Bridge.NomResistance attribute/property to set quarter-bridge completion.

Shunt Calibration

The RM-4339 includes two independent shunt calibration resistors, named A and B. You can select which resistor to use using the AI.Bridge.ShuntCal.Select attribute/property.

You can use an internal or external resistor for shunt resistor A. Use the AI.Bridge.ShuntCal.ShuntCalASrc attribute/property to set this. Select Built-In to use the internal 100 kΩ resistor, or User Provided to use an external resistor.

Shunt resistor B is an internal resistor that you can use only with quarter-bridge completion. You can use a 50 kΩ or 100 kΩ resistor by setting the AI.Bridge.ShuntCal.ShuntCalBResistance attribute/property.

Note Note

The DAQmx Perform Shunt Calibration function/VI and the Strain Gage Calibration Wizard in MAX do not support AI.Bridge.ShuntCal.ShuntCalASrc or AI.Bridge.ShuntCal.ShuntCalBResistance.

Parent topic: NI-DAQmx Device Considerations
Related concepts
SC Express Smart Accessory Connections


X Series Device Groupings

X Series Multiplexed Sampling Devices:

  • NI 6320
  • NI 6321
  • NI 6323
  • NI 6341
  • NI 6343
  • NI 6345
  • NI 6351
  • NI 6353
  • NI 6355
  • NI 6361
  • NI 6363
  • NI 6365
  • NI 6375

X Series Simultaneous Sampling Devices:

  • NI 6356
  • NI 6358
  • NI 6366
  • NI 6368
  • NI 6376
  • NI 6378
Parent topic: NI-DAQmx Device Considerations


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