\t (00:00:00) allegro 16.5 S024 (v16-5-13BH) i86
\t (00:00:00)     Journal start - Wed Oct 31 11:14:13 2012
\t (00:00:00)         Host=QUEEN-ELIZABETH User=jrosal Pid=2848 CPUs=2
\t (00:00:00) 
\t (00:00:04) Opening existing design...
\d (00:00:05) Database opened: J:/PCB_Layout/CNC_Board-Files/PB AUV DOCK/allegro/ODI_INTERLOCK_PCB.brd
\i (00:00:05) trapsize 61
\i (00:00:05) trapsize 60
\i (00:00:05) trapsize 61
\i (00:00:05) trapsize 139
\i (00:00:06) generaledit 
\i (00:00:08) open 
\i (00:00:12) fillin "J:\PCB_Layout\Open_Work_Space\10020865rA_MUX\allegro\10020865rA_MUX.brd"
\i (00:00:12) cd "J:\PCB_Layout\Open_Work_Space\10020865rA_MUX\allegro"
\t (00:00:12) Opening existing design...
\i (00:00:12) trapsize 415
\t (00:00:12)     Journal end - Wed Oct 31 11:14:26 2012