G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name:  J:/PCB_Layout/Open_Work_Space/THOM_RJ45-TEST-Board/rj45_testboard.brd*
G04 Film Name:    rj45_cuTOP*
G04 File Format:  Gerber RS274X*
G04 File Origin:  Cadence Allegro 16.6-S035*
G04 Origin Date:  Thu Oct 09 10:01:40 2014*
G04 *
G04 Layer:  ETCH/TOP*
G04 Layer:  PIN/TOP*
G04 Layer:  VIA CLASS/TOP*
G04 *
G04 Offset:    (0.0 0.0)*
G04 Mirror:    No*
G04 Mode:      Positive*
G04 Rotation:  0*
G04 FullContactRelief:  No*
G04 UndefLineWidth:     0.0*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
%FSLAX25Y25*MOIN*%
%IR0*IPPOS*OFA0.00000B0.00000*MIA0B0*SFA1.00000B1.00000*%
%ADD10C,.055*%
%ADD11C,.02*%
G75*
%LPD*%
G75*
G54D10*
X-2070Y90000D03*
X-10290Y100000D03*
X6180D03*
X-2070Y120000D03*
X6180Y130000D03*
X-10290D03*
X14400Y90000D03*
Y120000D03*
G54D11*
G01X-6180Y0D02*
Y77350D01*
X-10290Y81460D01*
Y100000D01*
G01X6180Y0D02*
Y75480D01*
X-2070Y83730D01*
Y90000D01*
G01X10290Y0D02*
Y80550D01*
X6180Y84660D01*
Y100000D01*
G01X-2070Y120000D02*
Y90430D01*
G01X6180Y130000D02*
Y100000D01*
G01X-10290Y130000D02*
Y100290D01*
G01X14400Y90000D02*
Y0D01*
G01Y120000D02*
Y90000D01*
M02*