\t (00:00:00) allegro 17.2 S005 Windows SPB 64-bit Edition
\t (00:00:00)     Journal start - Wed Mar 08 11:00:33 2017
\t (00:00:00)         Host=PACMAN User=jrosal Pid=5052 CPUs=24
\t (00:00:00) CmdLine= c:\cadence\spb_17.2\tools\bin\allegro.exe J:\PCB_Layout\Completed\10020788rB_COTS SMPS\allegro\10020788rB_COTS-SMPS.brd
\t (00:00:00) 
   (00:00:00) Loading axlcore.cxt 
\t (00:00:02) Opening existing design...
\i (00:00:04) fillin yes 
\d (00:00:04) Design opened: J:/PCB_Layout/Completed/10020788rB_COTS SMPS/allegro/10020788rB_COTS-SMPS.brd
\i (00:00:04) trapsize 490
\i (00:00:04) trapsize 498
\i (00:00:04) trapsize 661
\i (00:00:05) placementedit 
\i (00:00:09) exit 
\e (00:00:09) Do you want to save the changes you made to 10020788rB_COTS-SMPS.brd?
\i (00:00:10) fillin no 
\t (00:00:10)     Journal end - Wed Mar 08 11:00:43 2017