\t (00:00:01) allegro 16.5 S013 (v16-5-13AG) i86
\t (00:00:01)     Journal start - Mon Jan 09 16:14:07 2012
\t (00:00:01)         Host=QUEEN-ELIZABETH User=jrosal Pid=4592 CPUs=2
\t (00:00:01) 
\t (00:00:03) Opening existing design...
\d (00:00:03) Database opened: J:/PCB_Layout/Open_Work_Space/10020794_KFA_Patch_Bd/allegro/10020794_KFA_PATCH_BD.brd
\i (00:00:04) trapsize 422
\i (00:00:04) trapsize 412
\i (00:00:04) trapsize 423
\i (00:00:04) trapsize 412
\i (00:00:04) trapsize 412
\i (00:00:05) generaledit 
\i (00:00:06) open 
\i (00:00:16) fillin "J:\PCB_Layout\Open_Work_Space\10020792_KFA_LV_Vicor_Bd\allegro\10020792_KFA_LV_VICOR.brd"
\i (00:00:16) cd "J:\PCB_Layout\Open_Work_Space\10020792_KFA_LV_Vicor_Bd\allegro"
\t (00:00:16) Opening existing design...
\i (00:00:16) trapsize 412
\t (00:00:16)     Journal end - Mon Jan 09 16:14:22 2012