\t (00:00:01) allegro 17.2 S032 Windows SPB 64-bit Edition
\t (00:00:01)     Journal start - Thu May 17 11:00:23 2018
\t (00:00:01)         Host=PACMAN User=jrosal Pid=6676 CPUs=24
\t (00:00:01) CmdLine= C:\Cadence\SPB_17.2\tools\bin\allegro.exe
\t (00:00:01) 
   (00:00:01) Loading axlcore.cxt 
\t (00:00:03) Opening existing design...
\i (00:00:03) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged Gene_QD
\d (00:00:03) Design opened: J:/PCB_Layout/Open_Work_Space/GeneQuickDirtyBoard/allegro/Gene_QD.brd
\i (00:00:03) trapsize 374876
\i (00:00:03) trapsize 374876
\i (00:00:03) trapsize 332858
\i (00:00:03) trapsize 329816
\i (00:00:03) trapsize 381818
\i (00:00:03) trapsize 332858
\i (00:00:04) etchedit 
\i (00:00:13) opencd 'X:/Underway DuraFET/Project.Drawings/Project.EE.Dwgs/MCAP/allegro/100221250rA_MCAP.brd' 
\t (00:00:13) Opening existing design...
\i (00:00:13) trapsize 67
\t (00:00:13)     Journal end - Thu May 17 11:00:34 2018