#ifndef _ibc_card_H #define _ibc_card_H /****************************************************************************/ /* Copyright 1991 to 1993, MBARI */ /****************************************************************************/ /* Summary : IBC Board Definitions, board Types, addresses etc */ /* Filename : vme_ibc.h */ /* Author : Andrew Pearce */ /* Project : New ROV IBC Data Concentrator */ /* Version : 1.0 */ /* Created : 10/01/91 */ /* Modified : 04/07/93 */ /* Archived : */ /****************************************************************************/ /* Modification History: */ /* $Header: /usr/tiburon/.cvsroot/micro/h/ibc_card.h,v 1.5 1998/02/23 17:03:53 pean Exp $ * $Log: ibc_card.h,v $ * Revision 1.5 1998/02/23 17:03:53 pean * Added ISOLATED_IO_POS_TRUE for DSPL light ballasts. * * Revision 1.4 1997/09/09 17:30:34 pean * *** empty log message *** * * Revision 1.3 1997/05/22 22:50:21 pean * Check in of revised microcontroller sources after cleanup of vxWorks sources * * Revision 1.2 1997/05/19 23:33:03 audo * ibc_card.h -- clean up include paths * vicor.h -- Fixed temperature scaling and status * * Revision 1.1.1.1 1997/05/02 17:15:38 pean * Initial release of the microcontroller software after Tiburon * Moolpool Dive to test IView, Lapboxes, modified Power can * GF/5V using bus capacitance mode. * * Revision 1.1 93/07/02 09:33:49 09:33:49 pean (Andrew Pearce) * Initial revision * * */ /****************************************************************************/ #ifndef INCmicrodefh #include "/usr/tiburon/micro/h/microdef.h" #endif #define IBC_MAX_CARDS 12 /* No of IBC boards per backplane */ #define IBC_POWERUP_DELAY 25 /* 250 mSec delay after INIT = FALSE*/ typedef enum /* Supported IBC Board Type Id's */ { CPU196, /* IBC CPU 196 Board */ LOW_POWER_SWITCH, /* Quad Low Power Switch Board */ HIGH_POWER_SWITCH, /* High Power Switch Board */ DUAL_VICOR, /* Dual Vicor Power Supply Board */ GROUND_FAULT, /* Ground Fault/5V PSU Board */ QUAD_A_TO_D, /* Quad 16 bit A to D Board */ QUAD_SERIAL, /* Quad Serial Port Board */ NAV_INTERFACE, /* Navigation Sensor Interface Board*/ REGEN_CONTROL, /* Motor Regenerated Controller */ PARALLEL_IO, /* Parallel I/O Board */ ISOLATED_IO, /* Isolated I/O Board */ DATA_SWITCH, /* Data Switch Board for EREC */ HYDROPHONE_PSU, /* Hydrophone Power Supply Board */ NULL_IBC_BOARD, /* Null board type */ ISOLATED_IO_POS_TRUE /* Isolated I/O Board Positive Logic*/ } IBC_BoardType; typedef struct /* IBC Board Data Structure */ { Byte *baseAddress; /* Board base address */ IBC_BoardType boardType; /* Board type */ Byte intrLevel; /* Board interrupt level */ } IBC_BoardEntry; typedef struct { Nat16 numCards; Word address[IBC_MAX_CARDS]; } ibcCardConfig; typedef microAlarm ibcAlarm; /* Use microAlarm for ibcAlarm */ /* IBC Board PIC Interrupt Levels */ #define IBC_INT_LVL_0 0 /* Level 0 */ #define IBC_INT_LVL_1 1 /* Level 1 */ #define IBC_INT_LVL_2 2 /* Level 2 */ #define IBC_INT_LVL_3 3 /* Level 3 */ #define IBC_INT_LVL_4 4 /* Level 4 */ #define IBC_INT_LVL_5 5 /* Level 5 */ #define IBC_INT_LVL_6 6 /* Level 6 */ #define IBC_INT_LVL_7 7 /* Level 7 */ #define IBC_INT_LVL_OFF 255 /* No Interrupt Level Assigned */ /* ****** IBC Board Addresses ***** */ #define LOW_PWR_SWITCH_12V_0_ADDR 0x10 #define LOW_PWR_SWITCH_12V_1_ADDR 0x12 #define LOW_PWR_SWITCH_12V_2_ADDR 0x14 #define LOW_PWR_SWITCH_12V_3_ADDR 0x16 #define LOW_PWR_SWITCH_24V_0_ADDR 0x18 #define LOW_PWR_SWITCH_24V_1_ADDR 0x1A #define LOW_PWR_SWITCH_24V_2_ADDR 0x1C #define LOW_PWR_SWITCH_24V_3_ADDR 0x1E #define LOW_PWR_SWITCH_48V_0_ADDR 0x20 #define LOW_PWR_SWITCH_48V_1_ADDR 0x22 #define LOW_PWR_SWITCH_48V_2_ADDR 0x24 #define LOW_PWR_SWITCH_48V_3_ADDR 0x26 #define LOW_PWR_SWITCH_XXV_0_ADDR 0x28 #define LOW_PWR_SWITCH_XXV_1_ADDR 0x2A #define LOW_PWR_SWITCH_XXV_2_ADDR 0x2C #define LOW_PWR_SWITCH_XXV_3_ADDR 0x2E #define PARALLEL_IO_0_ADDR 0x40 #define PARALLEL_IO_1_ADDR 0x44 #define GROUND_FAULT_0_ADDR 0x48 #define GROUND_FAULT_1_ADDR 0x4A #define GROUND_FAULT_2_ADDR 0x4C #define GROUND_FAULT_3_ADDR 0x4E #define QUAD_A_TO_D_0_ADDR 0x50 #define QUAD_A_TO_D_1_ADDR 0x52 #define QUAD_A_TO_D_2_ADDR 0x54 #define QUAD_A_TO_D_3_ADDR 0x56 #define NAV_INTERFACE_ADDR 0x60 #define HYDROPHONE_PSU_ADDR 0x63 #define REGEN_CONTROL_0_ADDR 0x64 #define REGEN_CONTROL_1_ADDR 0x65 #define HIGH_PWR_SWITCH_0_ADDR 0x70 #define HIGH_PWR_SWITCH_1_ADDR 0x72 #define HIGH_PWR_SWITCH_2_ADDR 0x74 #define HIGH_PWR_SWITCH_3_ADDR 0x76 #define HIGH_PWR_SWITCH_4_ADDR 0x78 #define HIGH_PWR_SWITCH_5_ADDR 0x7A #define HIGH_PWR_SWITCH_6_ADDR 0x7C #define HIGH_PWR_SWITCH_7_ADDR 0x7E #define QUAD_SERIAL_0_ADDR 0x80 #define QUAD_SERIAL_1_ADDR 0xA0 #define ISO_IO_0_ADDR 0xC0 #define ISO_IO_1_ADDR 0xC4 #define ISO_IO_2_ADDR 0xC8 #define DUAL_VICOR_0_ADDR 0x200 #define DUAL_VICOR_1_ADDR 0x201 #define DATA_SWITCH_BOARD_0_ADDR 0x210 #endif /* _ibc_card_H */