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/* Copyright 1991 MBARI                                                     */
/****************************************************************************/
/* Summary  : Intel 82C59 Interrupt Controller definitions                  */
/* Filename : 82C59.h                                                       */
/* Author   : Andrew Pearce                                                 */
/* Project  : New ROV Data Concentrator                                     */
/* Version  : 1.0                                                           */
/* Created  : 05/19/92                                                      */
/* Modified : 05/19/92                                                      */
/* Archived :                                                               */
/****************************************************************************/
/* Modification History:                                                    */
/* $Header: /usr/tiburon/.cvsroot/micro/h/pic.h,v 1.1.1.1 1997/05/02 17:15:40 pean Exp $
 * $Log: pic.h,v $
 * Revision 1.1.1.1  1997/05/02 17:15:40  pean
 * Initial release of the microcontroller software after Tiburon
 * Moolpool Dive to test IView, Lapboxes, modified Power can
 * GF/5V using bus capacitance mode.
 *
 * Revision 1.1  93/07/02  09:22:30  09:22:30  pean (Andrew Pearce)
 * Initial revision
 *
 * Revision 1.1  92/05/19  14:29:16  14:29:16  pean (Andrew Pearce 408-647-3746)
 * Initial revision
 *
*/
/************************ 82C58A Interrupt Controller ***********************/

#ifndef  _80c196h
#include "C:/C96/INCLUDE/80C196.h"      /* 80196 Register mapping           */
#endif

#define PIC_INTR_LEVELS       8         /* Number of PIC Interrupt Levels   */

#define PIC_ICW1    picBaseAddr         /* Address of ICW1 register         */
#define PIC_ICW2    picNextAddr         /* Address of ICW2 register         */
#define PIC_ICW3    picNextAddr         /* Address of ICW3 register         */
#define PIC_ICW4    picNextAddr         /* Address of ICW4 register         */

#define PIC_OCW1    picNextAddr         /* Address of OCW1 register         */
#define PIC_OCW2    picBaseAddr         /* Address of OCW2 register         */
#define PIC_OCW3    picBaseAddr         /* Address of OCW3 register         */
#define PIC_IRR     picBaseAddr         /* Pseudo read addr of Int Request  */
#define PIC_IMASK   picNextAddr         /* Pseudo read address of Int Mask  */

                                        /* ****** PIC ICW1 Mode Bits ****** */
#define PIC_LEVEL_TRIG  0x18            /* Level triggered mode             */
#define PIC_EDGE_TRIG   0x10            /* Edge triggered mode              */
#define PIC_ADDR_INT_4  0x04            /* 4 Byte Address interval          */
#define PIC_ADDR_INT_8  0x00            /* 8 Byte Address interval          */
#define PIC_SINGLE      0x02            /* Single PIC System                */
#define PIC_CASCADE     0x00            /* Cascaded PIC System              */
#define PIC_ICW4_NEEDED 0x01            /* ICW4 register will be written    */
#define PIC_ICW4_IGNORE 0x00            /* ICW4 register ignored            */

                                        /* ****** PIC ICW4 Mode Bits ****** */
#define PIC_SFNM        0x10            /* Special Fully nested Mode        */
#define PIC_NO_SFNM     0x00            /* Not Special Fully nested Mode    */
#define PIC_NON_BUF     0x00            /* Non Buffered Mode                */
#define PIC_BUF_MASTER  0x0C            /* Buffered Mode/Master             */
#define PIC_BUF_SLAVER  0x08            /* Buffered Mode/Slave              */
#define PIC_AUTO_EOI    0x02            /* Automatic EOI                    */
#define PIC_NORMAL_EOI  0x00            /* Normal EOI                       */
#define PIC_8086_MODE   0x01            /* Select 8086 Mode                 */
#define PIC_8080_MODE   0x00            /* Select 8085 Mode                 */

#define PIC_NON_SPEC_EOI    0x20        /* Non-specific EOI command         */
#define PIC_SPECIFIC_EOI    0x60        /* Specific EOI command             */
#define PIC_INT_MASK_ALL    0xff

#define PIC_enable  int0Enable(EXTINT_MASK)  /* Enable ext int from PIC     */
#define PIC_disable int0Disable(EXTINT_MASK) /* Disable ext int from PIC    */

/****************************************************************************/

typedef Void (*VOIDFUNCPTR) ();         /* Ptr to function returning void   */

#ifdef __STDC__

Void initializePIC( Void );

Void PIC_intEnable( Nat16 level );

Void PIC_intDisable( Nat16 level );

Byte PIC_intStatus( Void );

Void PIC_intConnect( Byte intLevel, VOIDFUNCPTR intrFuncPtr, Word intrParam );

#endif