/****************************************************************************/
/* Copyright 1996 MBARI                                                     */
/****************************************************************************/
/* Summary  : Motorola MV162 CPU Board Industry Pack Configuration          */
/* Filename : mv162-ip.h                                                    */
/* Author   : Andrew Pearce                                                 */
/* Project  : Tiburon ROV                                                   */
/* Version  : Version 1.0                                                   */
/* Created  : 08/30/96                                                      */
/* Modified : 10/22/96                                                      */
/* Archived :                                                               */
/****************************************************************************/
/* Modification History:                                                    */
/* $Header: /usr/tiburon/.cvsroot/vw/h/mv162-ip.h,v 1.1.1.1 1997/05/16 22:33:04 pean Exp $
 * $Log: mv162-ip.h,v $
 * Revision 1.1.1.1  1997/05/16 22:33:04  pean
 * Initial check in after software freeze.
 *
 *
 */
/****************************************************************************/

#ifndef _MV162_IP_H
#define _MV162_IP_H

#define MV162_IP_MODULE_COUNT 4         /* 4 IP modules per mv162 base-board */

typedef enum                            /* IP Module Identifers              */
{
    IP_MODULE_A,
    IP_MODULE_B,
    IP_MODULE_C,
    IP_MODULE_D
} ipModuleId;

MLocal const char *mv162IPModuleName[] =
{
    "A", "B", "C", "D"
};

MLocal const struct                     /* mv162 IP module memoey mapping    */
{
    char *ipIOSpaceAddr;                /* IO Space base address             */
    char *ipIDSpaceAddr;                /* ID Space base address             */
    Word *ipIntVectReg;
} mv162IPModuleMap[MV162_IP_MODULE_COUNT] =

 { { (char *) 0xFFF58000, (char *) 0xFFF58080, (Word *) 0xc0000000 + 1},
   { (char *) 0xFFF58100, (char *) 0xFFF58180, (Word *) 0xc0800000 + 1},
   { (char *) 0xFFF58200, (char *) 0xFFF58280, (Word *) 0xc1000000 + 1},
   { (char *) 0xFFF58300, (char *) 0xFFF58380, (Word *) 0xc1800000 + 1}};

                                        /* mv162 IP module control registers  */
#define IPIC_BASE_ADDR          (volatile char *) 0xfffbc000

#define IPIC_ID_REG             IPIC_BASE_ADDR + 0x00
#define IPIC_CHIP_REG           IPIC_BASE_ADDR + 0x01

#define IPIC_IP_A_MEM_BASE_HI   IPIC_BASE_ADDR + 0x04
#define IPIC_IP_A_MEM_BASE_LOW  IPIC_BASE_ADDR + 0x05
#define IPIC_IP_B_MEM_BASE_HI   IPIC_BASE_ADDR + 0x06
#define IPIC_IP_B_MEM_BASE_LOW  IPIC_BASE_ADDR + 0x07
#define IPIC_IP_C_MEM_BASE_HI   IPIC_BASE_ADDR + 0x08
#define IPIC_IP_C_MEM_BASE_LOW  IPIC_BASE_ADDR + 0x09
#define IPIC_IP_D_MEM_BASE_HI   IPIC_BASE_ADDR + 0x0a
#define IPIC_IP_D_MEM_BASE_LOW  IPIC_BASE_ADDR + 0x0b

#define IPIC_IP_A_MEM_SIZE      IPIC_BASE_ADDR + 0x0c
#define IPIC_IP_B_MEM_SIZE      IPIC_BASE_ADDR + 0x0d
#define IPIC_IP_C_MEM_SIZE      IPIC_BASE_ADDR + 0x0e
#define IPIC_IP_D_MEM_SIZE      IPIC_BASE_ADDR + 0x0f

#define IPIC_IP_A_INT0_CTRL     IPIC_BASE_ADDR + 0x10
#define IPIC_IP_A_INT1_CTRL     IPIC_BASE_ADDR + 0x11
#define IPIC_IP_B_INT0_CTRL     IPIC_BASE_ADDR + 0x12
#define IPIC_IP_B_INT1_CTRL     IPIC_BASE_ADDR + 0x13
#define IPIC_IP_C_INT0_CTRL     IPIC_BASE_ADDR + 0x14
#define IPIC_IP_C_INT1_CTRL     IPIC_BASE_ADDR + 0x15
#define IPIC_IP_D_INT0_CTRL     IPIC_BASE_ADDR + 0x16
#define IPIC_IP_D_INT1_CTRL     IPIC_BASE_ADDR + 0x17

#define IPIC_IP_A_GEN_CTRL      IPIC_BASE_ADDR + 0x18
#define IPIC_IP_B_GEN_CTRL      IPIC_BASE_ADDR + 0x19
#define IPIC_IP_C_GEN_CTRL      IPIC_BASE_ADDR + 0x1a
#define IPIC_IP_D_GEN_CTRL      IPIC_BASE_ADDR + 0x1b

#define IPIC_IP_RESET_REG       IPIC_BASE_ADDR + 0x1f

#define IPIC_CHIP_ID              0x23

#define IPIC_IP_MEM_SIZE_64K      0x00
#define IPIC_IP_MEM_SIZE_128K     0x01
#define IPIC_IP_MEM_SIZE_256K     0x03
#define IPIC_IP_MEM_SIZE_512K     0x07
#define IPIC_IP_MEM_SIZE_1MB      0x0f
#define IPIC_IP_MEM_SIZE_2MB      0x1f
#define IPIC_IP_MEM_SIZE_4MB      0x3f
#define IPIC_IP_MEM_SIZE_8MB      0x7f
#define IPIC_IP_MEM_SIZE_16MB     0xff

#define IPIC_IP_INT_LVL0          0x00
#define IPIC_IP_INT_LVL1          0x01
#define IPIC_IP_INT_LVL2          0x02
#define IPIC_IP_INT_LVL3          0x03
#define IPIC_IP_INT_LVL4          0x04
#define IPIC_IP_INT_LVL5          0x05
#define IPIC_IP_INT_LVL6          0x06
#define IPIC_IP_INT_LVL7          0x07

#define IPIC_IP_INT_ICLR          0x08
#define IPIC_IP_INT_DISABLE       0x00
#define IPIC_IP_INT_ENABLE        0x10
#define IPIC_IP_INT_PENDING       0x20

#define IPIC_IP_INT_EDGE_TRIG     0x40
#define IPIC_IP_INT_LEVEL_TRIG    0x00

#define IPIC_IP_INT_POSITIVE      0x80
#define IPIC_IP_INT_NEGATIVE      0x00

#define IPIC_IP_MEM_SPACE_DISABLE 0x00
#define IPIC_IP_MEM_SPACE_ENABLE  0x01
#define IPIC_IP_MEM_WIDTH_32_BIT  0x00
#define IPIC_IP_MEM_WIDTH_16_BIT  0x08
#define IPIC_IP_MEM_WIDTH_8_BIT   0x04

#define IPIC_IP_REC_TIME_0_USEC   0x00
#define IPIC_IP_REC_TIME_2_USEC   0x10
#define IPIC_IP_REC_TIME_4_USEC   0x20
#define IPIC_IP_REC_TIME_8_USEC   0x30

#define IPIC_IP_MODULE_ERROR      0x80

#define IPIC_IP_RESET             0x01

#endif