/*****************************************************************************/ /* Copyright 1990 MBARI */ /*****************************************************************************/ /* Summary : Radstone SIO4 Serial Board misc. definitions */ /* Filename : sio4.h */ /* Author : Andrew Pearce */ /* Project : Radstone SIO4-100 Serial Board Driver for VxWorks */ /* Version : Version 1.0 */ /* Created : 03/01/90 */ /* Modified : 03/17/98 */ /* Archived : */ /*****************************************************************************/ #ifndef _sio4h_ #define _sio4h_ #define DIAG_OFF 0 /* No diagnostic messages printed */ #define DIAG_ON 1 /* Some diagnostic messages printed */ #define DIAG_FULL 2 /* All diagnostic messages printed */ #define SCC_DIAGNOSTICS DIAG_OFF /* Select diagnostic level */ /* allows direct manipulation of line*/ /* control parameters using ioctl */ struct termControl { DWord tc_cflag; /* Hardware control flags */ DWord tc_lflag; /* Line Discipline Modes */ DWord tc_iflag; /* Input Modes */ DWord tc_oflag; /* Output Modes */ Byte tc_control_chars[16]; /* Used for MIN and TIMEOUT only */ }; /* SIO4 driver returned error nos */ #define ESIO4_BAD_ID (M_RADSIO4 | 1) /* Bad ID Code read from card */ #define ESIO4_BAD_TYPE (M_RADSIO4 | 2) /* Bad ID Code read from card */ #define ESIO4_FAILED (M_RADSIO4 | 3) /* Firmware didn't come up */ #define ESIO4_FATAL (M_RADSIO4 | 4) /* Firmware detected card Failure*/ #define ESIO4_STATUS (M_RADSIO4 | 5) /* Bad Status Word read from card*/ #define ESIO4_LOAD_WAIT (M_RADSIO4 | 6) /* Card didn't do load sequence */ #define ESIO4_HOST_MDEF (M_RADSIO4 | 7) /* Bad Status Word read from card*/ #define ESIO4_HOST_IDEF (M_RADSIO4 | 8) /* Bad Status Word read from card*/ #define ESIO4_LM_TEST (M_RADSIO4 | 9) /* Bad Status Word read from card*/ #define ESIO4_LM_FAIL (M_RADSIO4 | 10) /* Card failed Location Mon Test */ #define ESIO4_NOT_READY (M_RADSIO4 | 11) /* SIO_READY status not received */ #define ESIO4_NO_DRIVER (M_RADSIO4 | 12) /* SIO4 driver not initialzed */ #define ESIO4_NO_CHAN (M_RADSIO4 | 13) /* bad channel number */ #define ESIO4_CEXIST (M_RADSIO4 | 14) /* channel already exists */ #define ESIO4_DC_CMD (M_RADSIO4 | 15) /* dc command failed */ #define ESIO4_CMD_LOCK (M_RADSIO4 | 16) /* dc_cmd lock failed */ #define ESIO4_CMD_WAKE (M_RADSIO4 | 17) /* dc_cmd wakeup failed */ #define ESIO4_CMD_ERROR (M_RADSIO4 | 18) /* dc_cmd returned error */ #define ESIO4_CMD_BAD (M_RADSIO4 | 19) /* dc command not valid */ #define ESIO4_COPEN (M_RADSIO4 | 20) /* channel already open */ #define ESIO4_NBYTES (M_RADSIO4 | 21) /* invalid byte count */ #define ESIO4_EFAULT (M_RADSIO4 | 22) /* firmware in inconsistent state*/ #define ESIO4_EBAUD (M_RADSIO4 | 23) /* Bad Baud Rate value specified */ #define ESIO4_EDBITS (M_RADSIO4 | 24) /* Bad Data Bits value specified */ #define ESIO4_ESBITS (M_RADSIO4 | 25) /* Bad Stop Bits value specified */ #define ESIO4_EPARITY (M_RADSIO4 | 26) /* Bad Parity value specified */ #define ESIO4_CMD_WAIT (M_RADSIO4 | 27) /* SIO4 sccWaitCmdDone failed */ #define ESIO4_MALLOC (M_RADSIO4 | 28) /* malloc failed - no memory */ #define ESIO4_EREQUEST (M_RADSIO4 | 29) /* IOCTL request not valid */ #define ESIO4_TIMEOUT (M_RADSIO4 | 30) /* Read request timed out */ #define ESIO4_FIFO (M_RADSIO4 | 31) /* Fifo problem */ /****************************************************************************** * Every thing from here on down is of little interest to the user. Driver * Internal data structures and defines only. ******************************************************************************/ #define SCC_NUM_BOARDS 4 /* Drive supporrts up to 2 scc boards*/ #define PORTS_PER_SCC 16 /* number of serial channels per card*/ #define SIO4_NO_CARD NULL /* sccCardBase set to NULL if no card*/ #define SIO4_ID_WORD 0x42456546 /* SIO4 board ID code in low memory */ #define SIO4_TYPE_WORD 0x53494F50 /* SIO4 board type code in low memory*/ #define HIGH_WATER_MARK 25 /* High Water Mark for writes to fifo*/ #ifndef MIN /* Minimum of two values */ #define MIN(a,b) (a > b ? b : a) #endif /* SIO4 low memory layout */ #define LOC_MON 0x00000400 /* Location Monitor Test Location */ #define SIO4_ID_CODE 0x00000404 /* Board ID Check Code 0x42456546 */ #define SIO4_STATUS 0x00000408 /* Status Word */ #define SIO4_TYPE_CODE 0x0000040C /* Board Type Code Loaded from EPROM*/ #define SIO4_LOADER_CMD 0x00000480 /* Loader Command Poll Address */ #define FSBP 0x00002F40 /* Firmware struct base pointer */ #define BF_CMD 0x00002F10 /* Buffer Fifo Command Word */ #define BF_MODIFIER 0x00002F14 /* Buffer Fifo Cmmand Modifier */ #define BF_ARG1 0x00002F18 /* Buffer Fifo Command Argument 1 */ #define BF_ARG2 0x00002F1C /* Buffer Fifo Command Argument 2 */ #define BF_ARG3 0x00002F20 /* Buffer Fifo Command Argument 3 */ #define BF_ARG4 0x00002F24 /* Buffer Fifo Command Argument 4 */ /* SIO4 Firmware Control Word Values */ #define LD_RTM 0x62AE0001 /* Exit loader and enter RT/M */ #define LD_MLOAD 0x62AE0002 /* Load code over VME and wait */ #define LD_MLOADGO 0x62AE0003 /* Load code over VME and go */ #define LD_PLOAD 0x62AE0004 /* Load code from EPROM and wait */ #define LD_PLOADGO 0x62AE0005 /* Load code from EPROM and go */ #define F_DEFAULT 0x44464C54 /* Command to use Default Fifo Sizes */ /* D 0x44, F 0x46, L 0x4C, T 0x5 */ /* SIO4 Firmware Status Word Values */ #define SELF_TEST_MODE 0x62AEF000 /* Firmware is in Self Test Mode */ #define FATAL_ERROR 0x62AEE000 /* Firmware Self Test Failed */ #define STATUS_OK 0x62AE0000 /* Firmware Self Test Passed */ #define HOST_LOAD_WAIT 0x001 /* Wait for Load Command from Host */ #define HOST_MDEF 0x014 /* Wait in Memory Definition Mode */ #define HOST_IDEF 0x028 /* Wait in Interrupt Definition Mode */ #define LM_TEST 0x040 /* Location Monitor Test Mode */ #define LM_TEST_DONE 0x042 /* Location Monitor Test Completed */ #define SIO_READY 0x400 /* Ready to Read & Write Serial Data */ /* access modes for interrupt response*/ #define SUP_DATA_ACCESS 0x1 /* Supervisor and Data modes */ #define ANY_ACCESS 0x3 /* Any access mode */ #define SINGLE_INTR 0x00000001 /* Select Single Interrupt Mode */ /* SIO Firmware command codes */ #define SIOOPEN 0x0001 /* Open Channel command */ #define SIOCLOSE 0x0002 /* Close Channel command */ #define SIOSETS 0x0003 /* Set Channel TTY Parameter command */ #define SIOSUSP 0x0004 /* Suspend processing of data */ #define SIOREACT 0x0005 /* Channel re-start command */ #define SIODUMMY 0x0006 /* Dummy to use command modifiers */ #define SIOBRK 0x0007 /* Send a break on a channel */ #define SIOSYNC 0xFFFF /* Firmware re-syncronize command */ /* control command modifiers */ #define OFLUSH 0x0001 /* Flush Output Buffer */ #define IFLUSH 0x0002 /* Flush Input Buffer */ #define ODRAIN 0x0004 /* Drain Output Buffer */ /* Input Mode Flag control definitions*/ #define IGNBRK 000000000001 /* Ignore break condition */ #define BRKINT 000000000002 /* Signal interrupt in break */ #define IGNPAR 000000000004 /* Ignore parity errors */ #define INLCR 000000000100 /* Map NL to CR on Input */ #define IGNCR 000000000200 /* Ignore CR on Input */ #define ICRNL 000000000400 /* Map CR to NL on Input */ /* Output Mode Flas control definition*/ #define OPOST 000000000001 /* Postprocess output */ #define ONLCR 000000000004 /* Map NL to CR-LF on Output */ #define OCRNL 000000000010 /* Map CR to LF on Output */ #define ONOCR 000000000020 /* No CR Output at column 0 */ #define ONLRET 000000000040 /* NL Performs CR function */ /* Firmware Baud Rate Specifiers */ #define B0 000000000000 /* Hang Up */ #define B50 000000000001 /* 50 baud */ #define B75 000000000002 /* 75 baud */ #define B110 000000000003 /* 110 baud */ #define B134 000000000004 /* 134 baud */ #define B150 000000000005 /* 150 baud */ #define B200 000000000006 /* 200 baud */ #define B300 000000000007 /* 300 baud */ #define B600 000000000010 /* 600 baud */ #define B1200 000000000011 /* 1200 baud */ #define B1800 000000000012 /* 1800 baud */ #define B2400 000000000013 /* 2400 baud */ #define B4800 000000000014 /* 4800 baud */ #define B9600 000000000015 /* 9600 baud */ #define B19200 000000000016 /* 19200 baud */ #define B38400 000000000017 /* 38400 baud */ #define CS5 000000000000 /* Character Size = 5 Bits */ #define CS6 000000000020 /* Character Size = 6 Bits */ #define CS7 000000000040 /* Character Size = 7 Bits */ #define CS8 000000000060 /* Character Size = 8 Bits */ #define CSTOPB 000000000100 /* Send two stop bits, else send one */ #define CREAD 000000000200 /* Enable Receiver */ #define PARENB 000000000400 /* Enable Parity */ #define PARODD 000000001000 /* Odd parity, else even */ #define HUPCL 000000002000 /* Hang up on last close */ #define CLOCAL 000000004000 /* Local line, else Dial Up */ #define VMIN 4 /* Minimum number of characters field*/ #define VTIME 5 /* Read timeout field */ /* SIO4 fifo data structure - copied */ /* from SIO4 manual issue 2 page 80 */ struct fifo { Nat16 f_tasok; /* internal use only */ Byte ff_rdlock; /* Fifo read tas byte */ Byte f_remrdflg; /* Internal user only */ Byte ff_wrlock; /* Fifo write tas byte */ Byte f_remwrflg; /* Internal user only */ short f_size; /* maximum number of elements */ short f_rdindex; /* Read Index */ short f_wrindex; /* Write Index */ DWord f_rdlcnt; /* Count of read tas failed */ DWord f_wrlcnt; /* Count of Write tas failed */ short f_lowmark; /* Low water mark */ short f_highmark; /* High water mark */ short f_semaphore; /* Internal use only */ }; /* defines for fifo manipulation */ #define FFEMPTY(fp) ((fp)->f_rd == (fp) - f_wr) #define FFSIZE(fp) ((fp)->f_size - 1) #define FFINIT(fp, size) {(fp)->f_size = (size) + 1; \ (fp)->f_tasok = 0; \ (fp)->f_remwrflg = 0; \ (fp)->f_remrdflg = 0; \ (fp)->f_wrlock = 0; \ (fp)->f_rdlock = 0; \ (fp)->f_wrlcnt = 0; \ (fp)->f_rdlcnt = 0; \ (fp)->f_wrindex = 0; \ (fp)->f_rdindex = 0; \ (fp)->f_semaphore = 0;} #define FFSET_LOW_WATER(fp, lwm) (fp->f_lowmark = lwm) #define FFSET_HIGH_WATER(fp, hwm) (fp->f_highmark = hwm) /****************************************************************************** The field ff_rdlock and ff_wrlock are used exclusively to lock the fifo. To ensure that the fifo is not corrupted during some data manipulations, the hardware must support a test and set instruction (read-modify-write cycle). The two pointers are used to index into the fifo. ******************************************************************************/ /****************************************************************************** The fifo sizes structure is used by the host if an F_CONFIG command is issued by the host at fifo initialization time. ******************************************************************************/ struct fifo_sizes { short fs_rawin, rs_rawout, fs_rawpout; short fs_hostout, fs_hostnoncin; short fs_ifc_no; short fs_ifcs[32]; }; #ifdef __STDC__ #ifdef INCLUDE_PROTOTYPES STATUS sccDrv(char *sioCardAddr, Nat16 sioIntVector, Nat16 sioIntLevel); STATUS sccDevCreate(char *name, Nat16 chan, Nat16 baudRate, Nat16 dataBits, Nat16 stopBits, char *parity); #endif /* INCLUDE_PROTOTYPES */ #endif /* __STDC__ */ #endif /* _sio4h_ */