/** \file
 *
 *  Contains the ISUS class implementation.
 *
 *  Copyright (c) 2007,2008,2009 MBARI
 *  MBARI Proprietary Information.  All Rights Reserved
 */

#include "ISUS.h"
#include "ISUSIF.h"

#include "data/SimSlate.h"
#include "data/Slate.h"
#include "data/StrValue.h"
#include "data/UniversalDataWriter.h"
#include "data/UniversalDataReader.h"
#include "units/Units.h"

#include <stdlib.h>

#define OUTPUT_LEN (50)
#define ISUS_DATA_ITEMS (4)


static const unsigned short ICRCTAB[256] =
{
    0x0000,  0x1021,  0x2042,  0x3063,  0x4084,  0x50a5,  0x60c6,  0x70e7,
    0x8108,  0x9129,  0xa14a,  0xb16b,  0xc18c,  0xd1ad,  0xe1ce,  0xf1ef,
    0x1231,  0x0210,  0x3273,  0x2252,  0x52b5,  0x4294,  0x72f7,  0x62d6,
    0x9339,  0x8318,  0xb37b,  0xa35a,  0xd3bd,  0xc39c,  0xf3ff,  0xe3de,
    0x2462,  0x3443,  0x0420,  0x1401,  0x64e6,  0x74c7,  0x44a4,  0x5485,
    0xa56a,  0xb54b,  0x8528,  0x9509,  0xe5ee,  0xf5cf,  0xc5ac,  0xd58d,
    0x3653,  0x2672,  0x1611,  0x0630,  0x76d7,  0x66f6,  0x5695,  0x46b4,
    0xb75b,  0xa77a,  0x9719,  0x8738,  0xf7df,  0xe7fe,  0xd79d,  0xc7bc,
    0x48c4,  0x58e5,  0x6886,  0x78a7,  0x0840,  0x1861,  0x2802,  0x3823,
    0xc9cc,  0xd9ed,  0xe98e,  0xf9af,  0x8948,  0x9969,  0xa90a,  0xb92b,
    0x5af5,  0x4ad4,  0x7ab7,  0x6a96,  0x1a71,  0x0a50,  0x3a33,  0x2a12,
    0xdbfd,  0xcbdc,  0xfbbf,  0xeb9e,  0x9b79,  0x8b58,  0xbb3b,  0xab1a,
    0x6ca6,  0x7c87,  0x4ce4,  0x5cc5,  0x2c22,  0x3c03,  0x0c60,  0x1c41,
    0xedae,  0xfd8f,  0xcdec,  0xddcd,  0xad2a,  0xbd0b,  0x8d68,  0x9d49,
    0x7e97,  0x6eb6,  0x5ed5,  0x4ef4,  0x3e13,  0x2e32,  0x1e51,  0x0e70,
    0xff9f,  0xefbe,  0xdfdd,  0xcffc,  0xbf1b,  0xaf3a,  0x9f59,  0x8f78,
    0x9188,  0x81a9,  0xb1ca,  0xa1eb,  0xd10c,  0xc12d,  0xf14e,  0xe16f,
    0x1080,  0x00a1,  0x30c2,  0x20e3,  0x5004,  0x4025,  0x7046,  0x6067,
    0x83b9,  0x9398,  0xa3fb,  0xb3da,  0xc33d,  0xd31c,  0xe37f,  0xf35e,
    0x02b1,  0x1290,  0x22f3,  0x32d2,  0x4235,  0x5214,  0x6277,  0x7256,
    0xb5ea,  0xa5cb,  0x95a8,  0x8589,  0xf56e,  0xe54f,  0xd52c,  0xc50d,
    0x34e2,  0x24c3,  0x14a0,  0x0481,  0x7466,  0x6447,  0x5424,  0x4405,
    0xa7db,  0xb7fa,  0x8799,  0x97b8,  0xe75f,  0xf77e,  0xc71d,  0xd73c,
    0x26d3,  0x36f2,  0x0691,  0x16b0,  0x6657,  0x7676,  0x4615,  0x5634,
    0xd94c,  0xc96d,  0xf90e,  0xe92f,  0x99c8,  0x89e9,  0xb98a,  0xa9ab,
    0x5844,  0x4865,  0x7806,  0x6827,  0x18c0,  0x08e1,  0x3882,  0x28a3,
    0xcb7d,  0xdb5c,  0xeb3f,  0xfb1e,  0x8bf9,  0x9bd8,  0xabbb,  0xbb9a,
    0x4a75,  0x5a54,  0x6a37,  0x7a16,  0x0af1,  0x1ad0,  0x2ab3,  0x3a92,
    0xfd2e,  0xed0f,  0xdd6c,  0xcd4d,  0xbdaa,  0xad8b,  0x9de8,  0x8dc9,
    0x7c26,  0x6c07,  0x5c64,  0x4c45,  0x3ca2,  0x2c83,  0x1ce0,  0x0cc1,
    0xef1f,  0xff3e,  0xcf5d,  0xdf7c,  0xaf9b,  0xbfba,  0x8fd9,  0x9ff8,
    0x6e17,  0x7e36,  0x4e55,  0x5e74,  0x2e93,  0x3eb2,  0x0ed1,  0x1ef0
};

/*
 * updcrc macro derived from article Copyright (C) 1986 Stephen Satchell.
 *  NOTE: First srgument must be in range 0 to 255.
 *        Second argument is referenced twice.
 *
 * Programmers may incorporate any or all code into their programs,
 * giving proper credit within the source. Publication of the
 * source routines is permitted so long as proper credit is given
 * to Stephen Satchell, Satchell Evaluations and Chuck Forsberg,
 * Omen Technology.
 */
#define updcrc(cp, crc) ( ICRCTAB[((crc >> 8) & 255)] ^ (crc << 8) ^ cp)


ISUS::ISUS( const Module* module )
    : SyncSensorComponent( ISUSIF::NAME, module ),
      uart_( ISUSIF::UART, ISUSIF::BAUD, 0.010, logger_, 4095 ),
      loadControl_( ISUSIF::LOAD_CONTROL, !simulateHardware(), logger_, this ),
      startTime_(),
      dataTime_(),
      timeout_( 18.0 ),
      dataTimeout_( 40.0 ),
      poTimeout_( 15.0 ),
      nitrate_( -5 ),
      debug_( false )

{

    // Read from Config file
    Slate::ReadOnce( ISUSIF::NITRATE_ACCURACY, Units::MICROMOLE_PER_LITER, nitrateAccuracy_, logger_ );

    // Universal inputs for CTD data
    salinityReader_ = newUniversalReader( UniversalURI::SEA_WATER_SALINITY );
    temperatureReader_ = newUniversalReader( UniversalURI::SEA_WATER_TEMPERATURE );
    depthReader_ = newUniversalReader( UniversalURI::DEPTH );

    dateStringWriter_ = newDataWriter( ISUSIF::DATESTRING ); // epoch seconds

    // Universal output initialized with specified accuracy
    nitrateWriter_ = newUniversalWriter( UniversalURI::MOLE_CONCENTRATION_OF_NITRATE_IN_SEA_WATER, Units::MICROMOLE_PER_LITER, nitrateAccuracy_ );

    // This configures the advanced run modes.
    setRunState( STOP );

    this->setFailureMissionCritical( false );

    this->setAllowableFailures( 3 );
    this->setRetryTimeout( 250 );
}

ISUS::~ISUS()
{
}

void ISUS::run()
{
    //logger_.syslog("Run", Syslog::INFO);
}

/// Do what needs to be done to run
/// Similar to initialize, in old init/run/uninit sequence
Component::RunState ISUS::start()
{
    if( debug_ ) logger_.syslog( "Start", Syslog::INFO );
    if( simulateHardware() )
    {
        return STARTING;
    }

    // Close if the uart if it is open
    if( uart_.isReadable() )
    {
        uart_.close();
        return START;
    }

    // Open the uart
    uart_.open();
    if( uart_.hasError() )
    {
        logger_.syslog( "Error opening port: ", uart_.errorString() );
        return START;
    }


    startTime_ = Timestamp::Now();
    logger_.syslog( "Powering up", Syslog::INFO );
    if( !simulateHardware() )
    {
        // The discrete may already be asserted from the stopped state, but will need to be activated here if we're coming out of a failed state
        if( !loadControl_.powerUp() )
        {
            logger_.syslog( "Failed to power up", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
            return STOPPED;
        }

        if( !loadControl_.discreteOn() )
        {
            logger_.syslog( "Discrete on failed", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
            return STOPPED;
        }
    }

    return STARTING;
}


/// Might follow a STOP...START sequence
Component::RunState ISUS::starting()
{
    if( debug_ ) logger_.syslog( "Starting", Syslog::INFO );

    if( simulateHardware() )
    {
        return RUNNABLE;
    }

    // We're operating on real hardware from here down

    if( !logVoltageAndCurrent() )
    {
        return STOP;
    }

    if( startTime_.elapsed() > poTimeout_ )
    {
        // This handles the sometimes long delay between the wake character and the time it actually wakes up.
        if( uart_.canReadUntil( "ACK,FAST,BEG" ) ) // || (startTime_.elapsed() > poTimeout_ + timeout_) )
        {
            uart_.flush();
            startTime_ = Timestamp::Now();
            dataTime_ = Timestamp::Now();
            return RUNNABLE;
        }
        else
        {
            uart_ << "fast"; // request async data from ISUS

            // But not for too long
            if( startTime_.elapsed() > poTimeout_ + timeout_ )
            {
                logger_.syslog( Str( "ISUS initialization failed." ), Syslog::FAULT );
                this->setFailure( FailureMode::COMMUNICATIONS );
                return STOP;
            }
        }
    }

    // coverity[secure_coding] // indicate that the code below is indeed safe
    return STARTING;
}


/// Pause for a short period (indicated by pauseTime)
Component::RunState ISUS::pause()
{
    // This state is not currently used
    if( debug_ ) logger_.syslog( "Pause", Syslog::INFO );
    return STOP;
}


// Should eventually follow a PAUSE request: should set continueTime
Component::RunState ISUS::paused()
{
    if( debug_ ) logger_.syslog( "Paused", Syslog::INFO );
    // This state is not currently used
    return STOP;
}


Component::RunState ISUS::resume()
{
    if( debug_ ) logger_.syslog( "Resume", Syslog::INFO );

    return START;
}


Component::RunState ISUS::resuming()
{
    if( debug_ ) logger_.syslog( "Resuming", Syslog::INFO );
    // This state is not currently used
    return START;
}


Component::RunState ISUS::runnable()
{
    if( debug_ ) logger_.syslog( "Runnable", Syslog::INFO );

    /// Pause if we don't want data
    if( !isDataRequested() )
    {
        return stop();
    }
    // If data is available, parse it
    if( !simulateHardware() )
    {

        if( !logVoltageAndCurrent() )
        {
            return STOP;
        }

        bool dataToWrite( false );
        while( uart_.canReadUntil( "\n" ) )
        {
            uart_.flushCRLF().readLine( deviceResponse_, sizeof( deviceResponse_ ) );

            dataToWrite = parse( deviceResponse_ );
            if( !dataToWrite )
            {
                logger_.syslog( "Error parsing device response", Syslog::DEBUG );
            }
            // If we have data to write, write it now and reset the timer
            if( dataToWrite )
            {
                writeData();
                startTime_ = Timestamp::Now();
                dataTime_ = Timestamp::Now();
                this->resetFailCount();
            }
        }

        // Re-init if we've expired
        if( dataTime_.elapsed() > dataTimeout_ )
        {
            logger_.syslog( Str( "No communication! Re-starting" ), Syslog::FAULT );
            this->setFailure( FailureMode::COMMUNICATIONS );
            return STOP;
        }

    }
    else
    {
        SimSlate::Read( SimSlate::MOLE_CONCENTRATION_OF_NITRATE_UMOLE_PER_L, nitrate_ );
        writeData();
        startTime_ = Timestamp::Now();
        dataTime_ = Timestamp::Now();
    }

    return RUNNABLE;
}


Component::RunState ISUS::stop()
{
    if( debug_ ) logger_.syslog( "Stop", Syslog::INFO );
    if( !simulateHardware() )
    {

        uart_ << 'S';
        uart_ << "off\r\n";

        if( !loadControl_.powerDown() )  // First power down then query for faults next cycle
        {
            logger_.syslog( "Failed to power down", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
            return STOPPING;
        }
        if( !loadControl_.discreteOff() )
        {
            logger_.syslog( "Discrete off failed", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
            return STOPPING;
        }
        uart_.close();
    }

    // Finally write a nan
    nitrateWriter_->write( Units::MICROMOLE_PER_LITER, nanf( "" ) );

    return STOPPING;
}


Component::RunState ISUS::stopping()
{
    if( debug_ ) logger_.syslog( "Stopping", Syslog::INFO );

    if( !simulateHardware() )
    {
        loadControl_.readFaults(); // See if anything went wrong that may have caused this request for uninitialize
        if( loadControl_.hasError() )
        {
            logger_.syslog( "LCB fault: " + loadControl_.errorString(), Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
        }
    }
    return STOPPED;
}


Component::RunState ISUS::stopped()
{
    if( debug_ ) logger_.syslog( "Stopped", Syslog::INFO );
    if( isDataRequested() )
    {
        return START;
    }
    return STOPPED;
}


bool ISUS::parseHeader()
{
    bool retVal = false;

    return retVal;
}


bool ISUS::parse( char *data )
{
    bool retVal = false;

    char* strTokPtr;
    char* checkedData;
    int tokens = 0;
    int cksum = 0xFF;

    if( ( data == NULL ) || ( strlen( data ) < 27 ) )
    {
        return false;
    }

    // First, separate data from checksum
    char* ckPtr = strtok_r( data, ",", &checkedData );

    checkedData[strlen( checkedData ) - 1] = '\0';
    unsigned short checksum_calculated = fCrc16Bit( ( const unsigned char * )checkedData );

    // Parse on comma. Date
    if( strtok_r( checkedData, ",", &strTokPtr ) != NULL )
    {
        dateString_ =  checkedData;
        isusDateString_ = Timestamp( dateString_ );
        tokens++;
    }

    // Nitrate
    char* response = strtok_r( NULL, ",", &strTokPtr );
    if( response != NULL )
    {
        nitrate_ = atof( response );
        tokens++;
    }

    // Fit
    response = strtok_r( NULL, ",", &strTokPtr );
    if( response != NULL )
    {
        nitrateAccuracy_ = atof( response );
        tokens++;
    }


    // Checksum
    // coverity[secure_coding] // indicate that the code below is indeed safe
    if( 1 == sscanf( ckPtr, "0x%04X", &cksum ) )
    {
        tokens++;
    }

    if( tokens == ISUS_DATA_ITEMS )
    {
        if( cksum == checksum_calculated )
        {
            retVal = true;
        }
    }
    return retVal;
}


void ISUS::writeData()
{
    nitrateWriter_->write( Units::MICROMOLE_PER_LITER, nitrate_ );
    dateStringWriter_->write( Units::SECOND, isusDateString_.asDouble() );
}


bool ISUS::logVoltageAndCurrent()
{
// Log voltage and current and check for any faults
    loadControl_.requestVoltageAndCurrent();
    if( loadControl_.hasError() )
    {
        // Put anything that isn't an actual fault first
        if( loadControl_.errorString().find( "Software Overcurrent" ) )
        {
            // TODO: Run a short mission to determine the offending subsystems.
            if( debug_ )logger_.syslog( "LCB error:" + loadControl_.errorString(), Syslog::ERROR ); // TODO: LCB firmware should be updated with software overcurrent values
        }
        // And things that set failures second
        else
        {
            logger_.syslog( "LCB fault: " + loadControl_.errorString(), Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
            return false;
        }
    }
    return true;
}


bool ISUS::isDataRequested()
{
    return nitrateWriter_->isDataRequested();
}


// This duplicated stop() for now so that quit will call it
void ISUS::uninitialize()
{
    if( !simulateHardware() )
    {
        uart_ << 'S';
        uart_ << "off\r\n";

        if( !loadControl_.powerDown() )
        {
            logger_.syslog( "Failed to power down", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
        }
        if( !loadControl_.discreteOff() )
        {
            logger_.syslog( "Discrete off failed", Syslog::FAULT );
            this->setFailure( FailureMode::HARDWARE );
        }
        uart_.close();
    }
}

/// Should return [myNamespace]::SIMULATE_HARDWARE, or [myNamespace]::POWER, etc
ConfigURI ISUS::getConfigURI( ConfigOption configOption ) const
{
    switch( configOption )
    {
    case CONFIG_POWER:
        return ISUSIF::POWER;
    case CONFIG_SIMULATE_HARDWARE:
        return ISUSIF::SIMULATE_HARDWARE;
    default:
        return ConfigURI::NO_CONFIG_URI;
    }
}

unsigned short ISUS::fCrc16Bit( const unsigned char *msg )
{
    unsigned short crc = 0xffff;
    while( *msg )
    {
        crc = updcrc( ( 0xff & *msg ), crc );
        msg++;
    }

    crc = updcrc( 0, updcrc( 0, crc ) );

    return( ( crc & 0xffff ) );
}